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27 | 27 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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28 | 28 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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29 | 29 | *********************************************************************************/
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| 30 | + |
30 | 31 | #include "SystemConfiguration.h"
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31 | 32 | #include "AddressMapping.h"
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32 | 33 |
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| 34 | +using namespace std; |
| 35 | + |
33 | 36 | namespace DRAMSim {
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34 | 37 |
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35 |
| -void addressMapping(uint64_t physicalAddress, unsigned &newTransactionChan, unsigned &newTransactionRank, unsigned &newTransactionBank, unsigned &newTransactionRow, unsigned &newTransactionColumn) |
| 38 | +unsigned sliceLowerBits(uint64_t& addr, unsigned bits) |
36 | 39 | {
|
37 |
| - uint64_t tempA, tempB; |
38 |
| - |
39 |
| - unsigned transactionSize = TRANSACTION_SIZE; |
40 |
| - uint64_t transactionMask = transactionSize - 1; //ex: (64 bit bus width) x (8 Burst Length) - 1 = 64 bytes - 1 = 63 = 0x3f mask |
41 |
| - |
42 |
| - unsigned channelBitWidth = NUM_CHANS_LOG; |
43 |
| - unsigned rankBitWidth = NUM_RANKS_LOG; |
44 |
| - unsigned bankBitWidth = NUM_BANKS_LOG; |
45 |
| - unsigned rowBitWidth = NUM_ROWS_LOG; |
46 |
| - unsigned colBitWidth = NUM_COLS_LOG; |
47 |
| - unsigned byteOffsetWidth = BYTE_OFFSET_WIDTH; |
48 |
| - |
49 |
| - // Since we're assuming that a request is for BL*BUS_WIDTH, the bottom bits |
50 |
| - // of this address *should* be all zeros if it's not, issue a warning |
51 |
| - if ((physicalAddress & transactionMask) != 0) { |
52 |
| - DEBUG("WARNING: address 0x"<<std::hex<<physicalAddress<<std::dec<<" is not aligned to the request size of "<<transactionSize); |
53 |
| - } |
54 |
| - |
55 |
| - // taking into account 256-bit prefetch architecture |
56 |
| - colBitWidth -= byteOffsetWidth; |
57 |
| - |
58 |
| - // taking into account transaction size |
59 |
| - physicalAddress >>= dramsim_log2(transactionSize); |
60 |
| - |
61 |
| - if (DEBUG_ADDR_MAP) { |
62 |
| - DEBUG("Bit widths: ch:"<<channelBitWidth<<" ra:"<<rankBitWidth<<" ba:"<<bankBitWidth |
63 |
| - <<" ro:"<<rowBitWidth<<" co:"<<colBitWidth <<" off:"<<byteOffsetWidth |
64 |
| - << " Total:"<< (channelBitWidth + rankBitWidth + bankBitWidth + rowBitWidth + colBitWidth + byteOffsetWidth)); |
65 |
| - } |
66 |
| - |
67 |
| - //perform various address mapping schemes |
68 |
| - if (addressMappingScheme == RoBaRaCoCh) { |
69 |
| - // row:bank:rank:col:chan |
70 |
| - tempA = physicalAddress; |
71 |
| - physicalAddress = physicalAddress >> channelBitWidth; |
72 |
| - tempB = physicalAddress << channelBitWidth; |
73 |
| - newTransactionChan = tempA ^ tempB; |
74 |
| - |
75 |
| - tempA = physicalAddress; |
76 |
| - physicalAddress = physicalAddress >> colBitWidth; |
77 |
| - tempB = physicalAddress << colBitWidth; |
78 |
| - newTransactionColumn = tempA ^ tempB; |
79 |
| - |
80 |
| - tempA = physicalAddress; |
81 |
| - physicalAddress = physicalAddress >> rankBitWidth; |
82 |
| - tempB = physicalAddress << rankBitWidth; |
83 |
| - newTransactionRank = tempA ^ tempB; |
84 |
| - |
85 |
| - tempA = physicalAddress; |
86 |
| - physicalAddress = physicalAddress >> bankBitWidth; |
87 |
| - tempB = physicalAddress << bankBitWidth; |
88 |
| - newTransactionBank = tempA ^ tempB; |
89 |
| - |
90 |
| - tempA = physicalAddress; |
91 |
| - physicalAddress = physicalAddress >> rowBitWidth; |
92 |
| - tempB = physicalAddress << rowBitWidth; |
93 |
| - newTransactionRow = tempA ^ tempB; |
94 |
| - } |
95 |
| - else if (addressMappingScheme == ChRaBaRoCo) { |
96 |
| - // chan:rank:bank:row:col |
97 |
| - tempA = physicalAddress; |
98 |
| - physicalAddress = physicalAddress >> colBitWidth; |
99 |
| - tempB = physicalAddress << colBitWidth; |
100 |
| - newTransactionColumn = tempA ^ tempB; |
101 |
| - |
102 |
| - tempA = physicalAddress; |
103 |
| - physicalAddress = physicalAddress >> rowBitWidth; |
104 |
| - tempB = physicalAddress << rowBitWidth; |
105 |
| - newTransactionRow = tempA ^ tempB; |
106 |
| - |
107 |
| - tempA = physicalAddress; |
108 |
| - physicalAddress = physicalAddress >> bankBitWidth; |
109 |
| - tempB = physicalAddress << bankBitWidth; |
110 |
| - newTransactionBank = tempA ^ tempB; |
111 |
| - |
112 |
| - tempA = physicalAddress; |
113 |
| - physicalAddress = physicalAddress >> rankBitWidth; |
114 |
| - tempB = physicalAddress << rankBitWidth; |
115 |
| - newTransactionRank = tempA ^ tempB; |
| 40 | + unsigned res = addr & ((1 << bits) - 1); |
| 41 | + addr >>= bits; |
| 42 | + return res; |
| 43 | +} |
116 | 44 |
|
117 |
| - tempA = physicalAddress; |
118 |
| - physicalAddress = physicalAddress >> channelBitWidth; |
119 |
| - tempB = physicalAddress << channelBitWidth; |
120 |
| - newTransactionChan = tempA ^ tempB; |
121 |
| - } |
122 |
| - else { |
123 |
| - ERROR("== Error - Unknown Address Mapping Scheme"); |
| 45 | +void addressMapping(uint64_t addr, unsigned &chn, unsigned &rnk, unsigned &bnk, unsigned &row, |
| 46 | + unsigned &col) |
| 47 | +{ |
| 48 | + //uint64_t addr_old = addr; |
| 49 | + |
| 50 | + unsigned tx_size = TRANSACTION_SIZE; |
| 51 | + unsigned tx_bits = log2(tx_size); |
| 52 | + |
| 53 | + unsigned chn_bits = NUM_CHANS_LOG; |
| 54 | + unsigned rnk_bits = NUM_RANKS_LOG; |
| 55 | + unsigned bnk_bits = NUM_BANKS_LOG; |
| 56 | + unsigned row_bits = NUM_ROWS_LOG; |
| 57 | + unsigned col_bits = NUM_COLS_LOG; |
| 58 | + |
| 59 | + // clear the lowest tx_bits since each transaction size is 2^tx_bits |
| 60 | + addr >>= tx_bits; |
| 61 | + |
| 62 | + // perform various address mapping schemes |
| 63 | + if (addressMappingScheme == RoBaRaCoCh) { // row:bank:rank:col:chan |
| 64 | + chn = sliceLowerBits(addr, chn_bits); |
| 65 | + col = sliceLowerBits(addr, col_bits); |
| 66 | + rnk = sliceLowerBits(addr, rnk_bits); |
| 67 | + bnk = sliceLowerBits(addr, bnk_bits); |
| 68 | + row = sliceLowerBits(addr, row_bits); |
| 69 | + } else if (addressMappingScheme == ChRaBaRoCo) { // chan:rank:bank:row:col |
| 70 | + col = sliceLowerBits(addr, col_bits); |
| 71 | + row = sliceLowerBits(addr, row_bits); |
| 72 | + bnk = sliceLowerBits(addr, bnk_bits); |
| 73 | + rnk = sliceLowerBits(addr, rnk_bits); |
| 74 | + chn = sliceLowerBits(addr, chn_bits); |
| 75 | + } else { |
| 76 | + ERROR("error - unknown address mapping scheme"); |
124 | 77 | exit(-1);
|
125 | 78 | }
|
126 | 79 |
|
127 | 80 | if (DEBUG_ADDR_MAP) {
|
128 |
| - DEBUG("Mapped Ch="<<newTransactionChan<<" Rank="<<newTransactionRank << " Bank="<<newTransactionBank<<" Row="<<newTransactionRow <<" Col="<<newTransactionColumn); |
| 81 | + DEBUG("addr:0x" << hex << addr_old << dec << " mapped to chan:" << chn << " rank:" << rnk << |
| 82 | + " bank:" << bnk << " row:" << row << " col:" << col); |
129 | 83 | }
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130 | 84 | }
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131 | 85 |
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