Imporve ident of delay control assignments (#1883)

(verilog-do-indent) Imporve ident of delay control assignments (#1883)

Author: my2817

tests/indent_delay_assignment.v

@@ -0,0 +1,14 @@
+module a();
+always(*)begin
+a = #1 b |
+c |
+d;
+a <= #1  b |
+c |
+d;
+a <= # 1  b |
+c |
+d;
+
+end
+endmodule

tests_ok/indent_delay_assignment.v

@@ -0,0 +1,14 @@
+module a();
+   always(*)begin
+      a = #1 b |
+             c |
+             d;
+      a <= #1  b |
+               c |
+               d;
+      a <= # 1  b |
+                c |
+                d;
+      
+   end
+endmodule

verilog-mode.el

@@ -7242,7 +7242,7 @@ Only look at a few lines to determine indent level."
          (verilog-beg-of-statement-1)
          (let ((val
                 (if (and (< (point) here)
-                         (verilog-re-search-forward "=[ \t]*" here 'move)
+                         (verilog-re-search-forward "=[ \t]*\\(#[ \t]*[0-9]+[ \t]*\\)?" here 'move)
                          ;; not at a |=>, #=#, or [=n] operator
                          (not (string-match "\\[=.\\|#=#\\||=>"
                                              (or (buffer-substring