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xhci.asm
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comment |*******************************************************************
* Copyright (c) 1984-2024 Forever Young Software Benjamin David Lunt *
* *
* i440FX BIOS ROM v1.0 *
* FILE: xhci.asm *
* *
* This code is freeware, not public domain. Please use respectfully. *
* *
* You may: *
* - use this code for learning purposes only. *
* - use this code in your own Operating System development. *
* - distribute any code that you produce pertaining to this code *
* as long as it is for learning purposes only, not for profit, *
* and you give credit where credit is due. *
* *
* You may NOT: *
* - distribute this code for any purpose other than listed above. *
* - distribute this code for profit. *
* *
* You MUST: *
* - include this whole comment block at the top of this file. *
* - include contact information to where the original source is located. *
* https://github.com/fysnet/i440fx *
* *
* DESCRIPTION: *
* xhci include file *
* *
* BUILT WITH: NewBasic Assembler *
* http://www.fysnet/newbasic.htm *
* NBASM ver 00.27.15 *
* Command line: nbasm i440fx /z<enter> *
* *
* Last Updated: 8 Dec 2024 *
* *
****************************************************************************
* Notes: *
* *
***************************************************************************|
.if DO_INIT_BIOS32
XHCI_CAP_REGS struct
xHcCaps dword
xHcHCSParams1 dword
xHcHCSParams2 dword
xHcHCSParams3 dword
xHcHCCParams1 dword
xHcDBOffset dword
xHcRTSOffset dword
xHcHCCParams2 dword
xHcVTIOSOffset dword
XHCI_CAP_REGS ends
XHCI_OP_REGS struct
xHcOPS_USBCommand dword
xHcOPS_USBStatus dword
xHcOPS_USBPageSize dword
xHcOPS_reserved0 dup 8
xHcOPS_USBDnctrl dword
xHcOPS_USBCrcr qword
xHcOPS_reserved1 dup 16
xHcOPS_USBDcbaap qword
xHcOPS_USBConfig dword
XHCI_OP_REGS ends
xHC_OPS_USBPortSt equ 0x400
xHC_PortUSB_POWER equ (1<<9)
xHC_PortUSB_CHANGE_BITS equ ((1<<17) | (1<<18) | (1<<19) | (1<<20) | (1<<21) | (1<<22))
XHCI_PORT_REGS struct
xHcPORT_PORTSC dword
xHcPORT_PORTPMSC dword
xHcPORT_PORTLI dword
xHcPORT_PORTresv dword
XHCI_PORT_REGS ends
xHCI_TRB struct
param qword
status dword
command dword
xHCI_TRB ends
xHCI_RING struct
address dword
cur_trb dword
cycle_bit byte
resv dup 3
xHCI_RING ends
; we only support (need) one segment
xHCI_EVENT_RING struct
address dword ; address of segment table
first_trb dword ; address of first trb in segment
cur_trb dword ; next free trb
cycle_bit byte ;
table_size byte ; size of table
cur_index byte ; current index
resv dup 5
xHCI_EVENT_RING ends
xHC_INTERRUPTER_IMAN equ 0x00
xHC_INTERRUPTER_IMAN_IP equ (1<<0)
xHC_INTERRUPTER_IMAN_IE equ (1<<1)
xHC_INTERRUPTER_IMOD equ 0x04
xHC_INTERRUPTER_TAB_SIZE equ 0x08
xHC_INTERRUPTER_RESV equ 0x0C
xHC_INTERRUPTER_ADDRESS equ 0x10
xHC_INTERRUPTER_DEQUEUE equ 0x18
xHC_INTERRUPTER_DEQUEUE_EHB equ (1<<3)
.enum NORMAL=1, SETUP_STAGE, DATA_STAGE, STATUS_STAGE, ISOCH, LINK, EVENT_DATA, NO_OP, \
ENABLE_SLOT=9, DISABLE_SLOT, ADDRESS_DEVICE, CONFIG_EP, EVALUATE_CONTEXT, RESET_EP, \
STOP_EP=15, SET_TR_DEQUEUE, RESET_DEVICE, FORCE_EVENT, DEG_BANDWIDTH, SET_LAT_TOLERANCE, \
GET_PORT_BAND=21, FORCE_HEADER, NO_OP_CMD, \
TRANS_EVENT=32, COMMAND_COMPLETION, PORT_STATUS_CHANGE, BANDWIDTH_REQUEST, DOORBELL_EVENT, \
HOST_CONTROLLER_EVENT=37, DEVICE_NOTIFICATION, MFINDEX_WRAP
; event completion codes
.enum TRB_SUCCESS=1, DATA_BUFFER_ERROR, BABBLE_DETECTION, TRANSACTION_ERROR, TRB_ERROR, STALL_ERROR, \
RESOURCE_ERROR=7, BANDWIDTH_ERROR, NO_SLOTS_ERROR, INVALID_STREAM_TYPE, SLOT_NOT_ENABLED, EP_NOT_ENABLED, \
SHORT_PACKET=13, RING_UNDERRUN, RUNG_OVERRUN, VF_EVENT_RING_FULL, PARAMETER_ERROR, BANDWITDH_OVERRUN, \
CONTEXT_STATE_ERROR=19, NO_PING_RESPONSE, EVENT_RING_FULL, INCOMPATIBLE_DEVICE, MISSED_SERVICE, \
COMMAND_RING_STOPPED=24, COMMAND_ABORTED, STOPPED, STOPPER_LENGTH_ERROR, xRESERVED, ISOCH_BUFFER_OVERRUN, \
EVERN_LOST=32, UNDEFINED, INVALID_STREAM_ID, SECONDARY_BANDWIDTH, SPLIT_TRANSACTION
NEC_TRB_TYPE_CMD_COMP equ 48
NEC_TRB_TYPE_GET_FW equ 49
NEC_TRB_TYPE_GET_UN equ 50
TRB_CYCLE_ON equ (1<<0)
TRB_CYCLE_OFF equ (0<<0)
TRB_TOGGLE_CYCLE_ON equ (1<<1)
TRB_TOGGLE_CYCLE_OFF equ (0<<1)
TRB_CHAIN_ON equ (1<<4)
TRB_CHAIN_OFF equ (0<<4)
TRB_IOC_ON equ (1<<5)
TRB_IOC_OFF equ (0<<5)
XHCI_USB2 equ 0x02
XHCI_USB3 equ 0x03
XHCI_SPEED_FULL equ 1
XHCI_SPEED_LOW equ 2
XHCI_SPEED_HIGH equ 3
XHCI_SPEED_SUPER equ 4
.enum xHCI_SLOT_CNTX, \
xHCI_CONTROL_EP, \
xHCI_EP1_OUT, \
xHCI_EP1_IN, \
xHCI_EP2_OUT, \
xHCI_EP2_IN, \
xHCI_EP3_OUT, \
xHCI_EP3_IN
; 24 bytes
xHCI_SLOT_CONTEXT struct
entries byte
hub byte
mtt byte
speed byte
route_string dword
num_ports byte
rh_port_num byte
max_exit_latency byte
int_target word
ttt byte
tt_port_num byte
tt_hub_slot_id byte
slot_state byte
device_address byte
resvd dup 6
xHCI_SLOT_CONTEXT ends
; EP State
.enum EP_STATE_DISABLED, EP_STATE_RUNNING, EP_STATE_HALTED, EP_STATE_STOPPED, EP_STATE_ERROR
; 40 bytes
xHCI_EP_CONTEXT struct
interval byte
lsa byte
max_pstreams byte
mult byte
hid byte
ep_state byte
max_packet_size word
max_burst_size word
ep_type byte
cerr byte
max_esit_payload dword
average_trb_len word
ring dup 12 ; sizeof(xHCI_RING)
tr_dequeue_pointer dword
dcs byte
resvd dup 5
xHCI_EP_CONTEXT ends
xHCI_EVENT_STATUS struct
count dword
status byte
resv dup 3
xHCI_EVENT_STATUS ends
; =-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-
; detect a xhci controller via the PCI services
; on entry:
; es -> EBDA
; on return
; nothing
; destroys none
init_xhci_boot proc near uses alld
; =-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-
; try to detect a xHCI by finding a xHCI PCI controller
xor esi,esi
xhci_cntrlr_detection:
push esi
; unused class subclass prog int
mov ecx,00000000_00001100_00000011_00110000b
mov ax,0xB103
int 1Ah
pop esi
jc init_xhci_boot_done
; found a xHCI controller, so initialize it
call xhci_initialize
jc init_xhci_boot_next
; point to our controller's block memory (use es:esi+USB_CONTROLLER->)
push esi
mov ebp,esi ; save the controller index in ebp
imul esi,sizeof(USB_CONTROLLER)
add esi,EBDA_DATA->usb_xhci_cntrls
; set and start the HC schedule
mov edi,es:[esi+USB_CONTROLLER->base]
movzx edx,byte es:[esi+USB_CONTROLLER->op_reg_offset]
mov dword fs:[edi+edx+XHCI_OP_REGS->xHcOPS_USBCommand],((1<<3) | (1<<2) | (1<<0))
; make sure each port is powered
test dword fs:[edi+XHCI_CAP_REGS->xHcHCCParams1],(1<<3)
jz short xhci_power_done
movzx cx,byte es:[esi+USB_CONTROLLER->numports]
add edx,xHC_OPS_USBPortSt
xhci_power_on:
test dword fs:[edi+edx+XHCI_PORT_REGS->xHcPORT_PORTSC],xHC_PortUSB_POWER
jnz short @f
mov dword fs:[edi+edx+XHCI_PORT_REGS->xHcPORT_PORTSC],xHC_PortUSB_POWER
@@: add edx,16
loop xhci_power_on
xhci_power_done:
xor edx,edx ; high dword of param
xor eax,eax ; low dword of param
xor ebx,ebx ; status
mov ecx,(NEC_TRB_TYPE_GET_FW << 10) ; command
call xhci_insert_command
; =-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-
; see if there are any devices present and enumerate them
xor edx,edx
; initialize our callback pointers
mov word es:[esi+USB_CONTROLLER->callback_bulk],offset xhci_do_bulk_packet
mov word es:[esi+USB_CONTROLLER->callback_control],offset xhci_control_packet
mov byte es:[esi+USB_CONTROLLER->device_cnt],0
; retrieve the extended caps
call xhci_get_ext_caps
mov es:[esi+USB_CONTROLLER->base_memory],eax
; point to our device struct (use fs:ebx+USB_DEVICE->)
xhci_dev_detection:
; get the protocol of this port
call xhci_get_port_protocol
mov bl,al
call xhci_port_reset
or al,al
jz short @f
; allocate the devices memory block
push bx ; save the protocol of this port
movzx ebx,byte es:[esi+USB_CONTROLLER->device_cnt]
imul ebx,sizeof(dword)
add ebx,esi
add ebx,USB_CONTROLLER->device_data
mov eax,sizeof(USB_DEVICE)
mov ecx,1
;push dx
;mov dx,offset mem_xhci_device_data
call memory_allocate
;pop dx
mov es:[ebx],eax
mov ebx,eax
pop ax ; restore the protocol of this port
mov fs:[ebx+USB_DEVICE->xhci_protocol],al
mov al,es:[esi+USB_CONTROLLER->device_cnt]
mov fs:[ebx+USB_DEVICE->device_num],al
; we have to give a default speed, until we determine the speed
call xhci_default_mps
mov fs:[ebx+USB_DEVICE->mps],ax
mov fs:[ebx+USB_DEVICE->speed],cl
; we have something connected and enabled
call xhci_get_a_slot
or ax,ax
jnz short @f
; enumerate the device
call xhci_enumerate
or ax,ax
jnz short @f
; mark the controller type (and index)
mov ax,bp ; controller index
shl al,4 ; index is in bits 5:4
or al,USB_CONTROLLER_XHCI
mov fs:[ebx+USB_DEVICE->controller],al
; mount the drive
call usb_mount_device
or al,al
jz short @f
; increment the count of devices found
inc byte es:[esi+USB_CONTROLLER->device_cnt]
cmp byte es:[esi+USB_CONTROLLER->device_cnt],USB_DEVICE_MAX
je short xhci_dev_detection0
; try the next port
@@: inc edx
movzx eax,byte es:[esi+USB_CONTROLLER->numports]
cmp edx,eax
jb xhci_dev_detection
; if no devices found, stop the controller
xhci_dev_detection0:
cmp byte es:[esi+USB_CONTROLLER->device_cnt],0
jne short @f
; simply clear the run bit
mov eax,es:[esi+USB_CONTROLLER->base]
movzx edx,byte es:[esi+USB_CONTROLLER->op_reg_offset]
and dword fs:[eax+edx+XHCI_OP_REGS->xHcOPS_USBCommand],(~(1<<0))
; loop so that we can see if there are any more
@@: pop esi
init_xhci_boot_next:
inc esi
cmp esi,MAX_USB_CONTROLLERS
jb xhci_cntrlr_detection
init_xhci_boot_done:
ret
init_xhci_boot endp
; =-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-
; initialize the found xhci controller
; on entry:
; es -> EBDA
; bh = bus
; bl = dev/func
; esi = 0 for first controller, 1 for second, 2 for third, etc
; on return
; carry clear if successful
; destroys none
xhci_initialize proc near uses alld ds
; the xHCI is memmapped, so find the address
mov ax,0xB10A
mov di,0x10
int 1Ah
; is it Port IO?
test cl,1
jnz xhci_initialize_error
and cl,(~0xF)
push ecx ; save the base
; we need to make sure the high-order dword is zero
xor ecx,cx
mov ax,0xB10C
mov di,0x14
int 1Ah
pop edi ; restore the address in edi
; make sure IO is allowed
push edi
mov ax,0xB109
mov di,0x04
int 1Ah
or cx,6 ; memory io and busmaster enable
mov ax,0xB10C
mov di,0x04
int 1Ah
pop edi
; start to save information
imul esi,sizeof(USB_CONTROLLER)
add esi,EBDA_DATA->usb_xhci_cntrls
mov byte es:[esi+USB_CONTROLLER->valid],0 ; not valid for now
mov es:[esi+USB_CONTROLLER->busdevfunc],bx
mov es:[esi+USB_CONTROLLER->base],edi
mov byte es:[esi+USB_CONTROLLER->flags],0
push edi
; get the irq
mov ax,0xB108
mov di,0x3C
int 1Ah
mov es:[esi+USB_CONTROLLER->irq],cl
; we need to write to the FLADJ register
mov cl,0x20
mov ax,0xB10B
mov di,0x61
int 1Ah
pop edi
; get the Operational Register Set offset
mov edx,fs:[edi+XHCI_CAP_REGS->xHcCaps]
and edx,0x000000FF
cmp dl,0x20
jb xhci_initialize_error
test dl,0x03
jnz xhci_initialize_error
mov es:[esi+USB_CONTROLLER->op_reg_offset],dl
; make sure the run/stop bit is clear
and dword fs:[edi+edx+XHCI_OP_REGS->xHcOPS_USBCommand],(~(1<<0))
; wait for/make sure the Halted bit is set
@@: test dword fs:[edi+edx+XHCI_OP_REGS->xHcOPS_USBStatus],(1<<0)
jz short @b
; reset using the HCReset bit
or dword fs:[edi+edx+XHCI_OP_REGS->xHcOPS_USBCommand],(1<<1)
; wait for this bit to be clear
@@: test dword fs:[edi+edx+XHCI_OP_REGS->xHcOPS_USBCommand],(1<<1)
jnz short @b
; and the CtlrNotReady bit to be clear
test dword fs:[edi+edx+XHCI_OP_REGS->xHcOPS_USBStatus],(1<<11)
jnz short @b
; wait for the recovery time
mov eax,USB_TRSTRCY
call mdelay
; get context size
mov byte es:[esi+USB_CONTROLLER->context_size],32
mov ecx,fs:[edi+XHCI_CAP_REGS->xHcHCCParams1]
test cl,(1<<2)
jz short @f
mov byte es:[esi+USB_CONTROLLER->context_size],64
; do we use 64-bit addressing
@@: and cl,(1<<0)
or es:[esi+USB_CONTROLLER->flags],cl
; check the defaults of the Operation Registers
cmp dword fs:[edi+edx+XHCI_OP_REGS->xHcOPS_USBCommand],0
jne xhci_initialize_error
mov ecx,fs:[edi+edx+XHCI_OP_REGS->xHcOPS_USBStatus]
and ecx,(~((1<<4) | (1<<3)))
cmp ecx,1
jne xhci_initialize_error
cmp dword fs:[edi+edx+XHCI_OP_REGS->xHcOPS_USBDnctrl],0
jne xhci_initialize_error
cmp dword fs:[edi+edx+XHCI_OP_REGS->xHcOPS_USBCrcr],0
jne xhci_initialize_error
cmp dword fs:[edi+edx+XHCI_OP_REGS->xHcOPS_USBDcbaap],0
jne xhci_initialize_error
cmp dword fs:[edi+edx+XHCI_OP_REGS->xHcOPS_USBConfig],0
jne xhci_initialize_error
; get the count of ports
mov ecx,fs:[edi+XHCI_CAP_REGS->xHcHCSParams1]
shr ecx,24
mov es:[esi+USB_CONTROLLER->numports],cl
; get the page size
mov ecx,fs:[edi+edx+XHCI_OP_REGS->xHcOPS_USBPageSize]
and ecx,0x0000FFFF
shl ecx,12
mov es:[esi+USB_CONTROLLER->page_size],cx
; get max slots
mov ecx,fs:[edi+XHCI_CAP_REGS->xHcHCSParams1]
mov es:[esi+USB_CONTROLLER->max_slots],cl
; get max scratch pad buffers, and allocate the memory for them
; this also allocates the DCBAAP buffer
mov ecx,fs:[edi+XHCI_CAP_REGS->xHcHCSParams2]
mov eax,ecx
shr eax,27
and ecx,0x03E00000
shr ecx,16
or eax,ecx
movzx ecx,word es:[esi+USB_CONTROLLER->page_size]
call xhci_allocate_scratch
jc xhci_initialize_error
mov fs:[edi+edx+XHCI_OP_REGS->xHcOPS_USBDcbaap+0],eax
mov dword fs:[edi+edx+XHCI_OP_REGS->xHcOPS_USBDcbaap+4],0
mov es:[esi+USB_CONTROLLER->dcbaap_addr],eax
; allocate the slots
movzx eax,byte es:[esi+USB_CONTROLLER->max_slots]
imul eax,(64 * 32) ; max slots * max slot size * 32 contexts each
;push dx
;mov dx,offset mem_xhci_slots
call memory_allocate ; ecx still = alignment
;pop dx
mov es:[esi+USB_CONTROLLER->slots_buffer],eax
; allocate the command ring
push esi
lea esi,[esi+USB_CONTROLLER->command_ring]
push es ;
pop ax ;
movzx eax,ax ; make the esi pointer a physical address pointer
shl eax,4 ;
add esi,eax ;
mov eax,32 ; count of TRBs to create
call xhci_alloc_ring
pop esi
jc short xhci_initialize_error
mov fs:[edi+edx+XHCI_OP_REGS->xHcOPS_USBCrcr+0],eax
mov dword fs:[edi+edx+XHCI_OP_REGS->xHcOPS_USBCrcr+4],0
; configure register
movzx eax,byte es:[esi+USB_CONTROLLER->max_slots]
mov fs:[edi+edx+XHCI_OP_REGS->xHcOPS_USBConfig],eax
; Device Notification Control
mov dword fs:[edi+edx+XHCI_OP_REGS->xHcOPS_USBDnctrl],(1<<1)
; initialize the interrupters
;mov eax,fs:[edi+XHCI_CAP_REGS->xHcHCSParams2]
;and eax,0x000000F0
;shr eax,4
;mov es:[esi+USB_CONTROLLER->max_event_segs],al
;mov ecx,fs:[edi+XHCI_CAP_REGS->xHcHCSParams1]
;and ecx,0x0007FF00
;shr ecx,8
;mov es:[esi+USB_CONTROLLER->max_interrupters],cx
; create the event ring for the interrupter
push esi
lea esi,[esi+USB_CONTROLLER->event_ring]
mov eax,64 ; count of TRBs to create
call xhci_alloc_event_ring
pop esi
; make sure the status register is cleared
mov dword fs:[edi+edx+XHCI_OP_REGS->xHcOPS_USBStatus],((1<<10) | (1<<4) | (1<<3) | (1<<2))
; =-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-
; we have found and initialized a xHCI
; mark this information valid
mov byte es:[esi+USB_CONTROLLER->valid],1
; print that we found a xHCI
mov ax,BIOS_BASE2
mov ds,ax
movzx ax,byte es:[esi+USB_CONTROLLER->irq]
push ax
movzx ax,byte es:[esi+USB_CONTROLLER->numports]
push ax
push dword es:[esi+USB_CONTROLLER->base]
mov si,offset xhci_found_str0
call bios_printf
add sp,8
; successful return
clc
ret
xhci_initialize_error:
stc
ret
xhci_initialize endp
; =-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-
; allocate the scratch pad area and DCBAAP
; on entry:
; es -> EBDA
; fs:edi -> CAPS registers
; edx = OPS register set offset (edi+edx -> op registers)
; es:esi -> this USB_CONTROLLER structure
; eax = count of scratchpad buffers to allocate (could be zero)
; ecx = page size
; on return
; carry clear if success
; eax = DCBAAP buffer address
; carry set if error
; destroys none
xhci_allocate_scratch proc near uses ebx ecx edx edi
; save the count of scratchpad buffers requested
mov edx,eax
; we only support up to 64 scratch pad buffers,
; and at least a 512-byte alignment.
cmp eax,64
ja short xhci_allocate_scratch_error
cmp ecx,512
jb short xhci_allocate_scratch_error
; allocate (1 + 1 + eax) * ecx sized buffer ecx aligned
; dcbaap = the start of this buffer
inc eax ; one for the dcbaap
cmp eax,1 ; if no scratchpad, only allocate the dcbaap
je short @f
inc eax ; one for the scratchpad pointers
@@: imul eax,ecx
;push dx
;mov dx,offset mem_xhci_dcbaap
call memory_allocate
;pop dx
; if no scratchpad buffers needed, we are done
or edx,edx
jz short xhci_allocate_scratch_done
; scratchpad = dcbaap + ecx
; for (eax) { scratchpad[x] = scrachpad + ecx + (eax[] * 4) }
lea edi,[eax+ecx] ; skip over dcbaap
mov fs:[eax+0],edi ; write the address of the scratchpad to dcbaap[0]
mov dword fs:[eax+4],0 ;
lea ebx,[edi+ecx] ; skip over buffer pointer list
@@: mov fs:[edi+0],ebx
mov dword fs:[edi+4],0
add edi,8 ; move to next pointer
add ebx,ecx ; move to next buffer
dec edx
jnz short @b
; success (eax -> buffer)
xhci_allocate_scratch_done:
clc
ret
xhci_allocate_scratch_error:
stc
ret
xhci_allocate_scratch endp
; =-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-
; allocate and create a command style ring
; (must not cross a 64k boundary)
; (must not be more than 64 entries)
; on entry:
; eax = count of TRBs to include in ring
; fs:esi -> ring to create (struct xHCI_RING)
; on return
; carry clear if success
; eax = value to write to the CRCR register, etc.
; carry set if error
; destroys none
xhci_alloc_ring proc near uses ebx ecx edx edi
; this should be an internal check
cmp eax,64
ja xhci_alloc_ring_error
; save count in edx
mov edx,eax
; only try 4 times
mov ebx,4
@@: mov eax,edx ; restore the count
mov ecx,64 ; must be 64-byte aligned
imul eax,sizeof(xHCI_TRB)
;push dx
;mov dx,offset mem_xhci_ring
call memory_allocate
;pop dx
; check to see if this address + size crosses a 64k boundary
imul ecx,edx,sizeof(xHCI_TRB)
add ecx,eax
dec ecx
xor ecx,eax
test ecx,0x00010000
jz short @f
; crosses a 64k boundary so try again?
; (this will leave the affending buffer allocated)
; (but it will be at most 1024 bytes)
dec ebx
jnz short @b
jmp short xhci_alloc_ring_error
; found an address (in eax) that is 64-byte aligned and does not cross a 64k boundary
@@: mov fs:[esi+xHCI_RING->address],eax
mov fs:[esi+xHCI_RING->cur_trb],eax
mov byte fs:[esi+xHCI_RING->cycle_bit],TRB_CYCLE_ON
; clear the trbs
mov edi,eax
imul eax,edx,sizeof(xHCI_TRB)
call memset32
; point the last TRB to the first TRB
sub eax,sizeof(xHCI_TRB)
mov fs:[edi+eax+xHCI_TRB->param+0],edi
mov dword fs:[edi+eax+xHCI_TRB->param+4],0
mov dword fs:[edi+eax+xHCI_TRB->status],0
mov dword fs:[edi+eax+xHCI_TRB->command],((LINK << 10) | TRB_IOC_OFF | TRB_CHAIN_OFF | TRB_TOGGLE_CYCLE_ON | TRB_CYCLE_ON)
mov eax,edi
or eax,TRB_CYCLE_ON
; success
clc
ret
xhci_alloc_ring_error:
stc
ret
xhci_alloc_ring endp
; =-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-
; allocate and create a segmented ring (with table)
; (must not be more than 64 entries)
; updates the interrupter registers for this event ring
;
; on entry:
; es -> EBDA
; fs:edi -> CAPS registers
; edx = OPS register set offset (edi+edx -> op registers)
; es:esi -> this USB_CONTROLLER structure -> ring to create (struct xHCI_EVENT_RING)
; eax = count of TRBs to include in ring
; on return
; carry clear if success
; carry set if error
; destroys none
xhci_alloc_event_ring proc near uses alld
; this should be an internal check
cmp eax,64
ja xhci_alloc_event_ring_error
cmp eax,16
jb xhci_alloc_event_ring_error
; save count in edx
mov edx,eax
push edi ; save pointer to CAPS registers
; allocate 16-byte segment table entry + (eax * sizeof(TRB))
mov ecx,64
inc eax
imul eax,sizeof(xHCI_TRB)
;push dx
;mov dx,offset mem_xhci_event_ring
call memory_allocate
;pop dx
; create the one and only segment entry
push eax ; save address to table
mov edi,eax
add eax,16
mov fs:[edi+0],eax
mov dword fs:[edi+4],0
mov fs:[edi+8],edx
mov dword fs:[edi+12],0
; clear the trbs
mov edi,eax
imul eax,edx,sizeof(xHCI_TRB)
call memset32
pop eax ; restore address to table
mov es:[esi+xHCI_EVENT_RING->address],eax
mov es:[esi+xHCI_EVENT_RING->table_size],dl
mov es:[esi+xHCI_EVENT_RING->first_trb],edi
mov es:[esi+xHCI_EVENT_RING->cur_trb],edi
mov byte es:[esi+xHCI_EVENT_RING->cycle_bit],TRB_CYCLE_ON
mov byte es:[esi+xHCI_EVENT_RING->cur_index],0
pop edi ; restore pointer to CAPS registers
mov eax,fs:[edi+XHCI_CAP_REGS->xHcRTSOffset]
add eax,0x20
mov dword fs:[edi+eax+xHC_INTERRUPTER_IMAN],((1 << 1) | (1 << 0))
mov dword fs:[edi+eax+xHC_INTERRUPTER_IMOD],0
mov dword fs:[edi+eax+xHC_INTERRUPTER_TAB_SIZE],1
mov ecx,es:[esi+xHCI_EVENT_RING->first_trb]
or ecx,(1 << 3)
mov fs:[edi+eax+xHC_INTERRUPTER_DEQUEUE+0],ecx
mov dword fs:[edi+eax+xHC_INTERRUPTER_DEQUEUE+4],0
mov ecx,es:[esi+xHCI_EVENT_RING->address]
mov fs:[edi+eax+xHC_INTERRUPTER_ADDRESS+0],ecx
mov dword fs:[edi+eax+xHC_INTERRUPTER_ADDRESS+4],0
clc
ret
xhci_alloc_event_ring_error:
stc
ret
xhci_alloc_event_ring endp
; =-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-
; insert command into the command ring
; on entry:
; es -> EBDA
; edx:eax = param field
; ebx = status field
; ecx = command field
; es:esi -> this USB_CONTROLLER structure
; on return
; fs:eax -> address to the TRB we added
; destroys none
xhci_insert_command proc near uses ecx edi
; point esi to the command ring
push esi
lea esi,[esi+USB_CONTROLLER->command_ring]
mov edi,es:[esi+xHCI_RING->cur_trb]
push eax
push esi
; get the physical address: esi -> es:esi
mov eax,es
shl eax,4
add esi,eax
mov al,0 ; no chain bit
call xhci_get_next_trb
pop esi
pop eax
; write the TRB
mov fs:[edi+xHCI_TRB->param+0],eax
mov fs:[edi+xHCI_TRB->param+4],edx
mov fs:[edi+xHCI_TRB->status],ebx
or cl,es:[esi+xHCI_RING->cycle_bit]
mov fs:[edi+xHCI_TRB->command],ecx
mov eax,edi
pop esi
; ring the command doorbell and wait for the event
push eax
xor ax,ax ; doorbell (0 = command, x = endpoint)
call xhci_process_doorbell
pop eax
; return, eax -> this TRB
ret
xhci_insert_command endp
; =-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-
; process a command insertion
; on entry:
; es -> EBDA
; al = slot ( 0 = command, 1 = slot 1, etc.)
; ah = doorbell to ring (1 = ep 1, etc.)
; es:esi -> this USB_CONTROLLER structure
; on return
; returns nothing
; destroys none
xhci_process_doorbell proc near uses alld
push bp
mov bp,sp
sub sp,6
xhci_event_cur_trb equ [bp-4] ; dword (current event trb)
xhci_doorbell_slot equ [bp-5] ; byte
xhci_doorbell_endpt equ [bp-6] ; byte
mov xhci_doorbell_slot,al
mov xhci_doorbell_endpt,ah
; make sure the status register is cleared
movzx edx,byte es:[esi+USB_CONTROLLER->op_reg_offset]
mov edi,es:[esi+USB_CONTROLLER->base]
mov eax,fs:[edi+edx+XHCI_OP_REGS->xHcOPS_USBStatus]
mov fs:[edi+edx+XHCI_OP_REGS->xHcOPS_USBStatus],eax
; ring the door bell
movzx eax,byte xhci_doorbell_slot
shl eax,2
add eax,fs:[edi+XHCI_CAP_REGS->xHcDBOffset]
movzx ebx,byte xhci_doorbell_endpt
mov fs:[edi+eax],ebx
; wait for the 'interrupt' to happen
@@: mov eax,fs:[edi+edx+XHCI_OP_REGS->xHcOPS_USBStatus]
test eax,(1<<3)
jz short @b
mov fs:[edi+edx+XHCI_OP_REGS->xHcOPS_USBStatus],eax
mov eax,fs:[edi+XHCI_CAP_REGS->xHcRTSOffset]
add eax,0x20
@@: mov ebx,fs:[edi+eax+xHC_INTERRUPTER_IMAN]
and ebx,(xHC_INTERRUPTER_IMAN_IE | xHC_INTERRUPTER_IMAN_IP)
cmp ebx,(xHC_INTERRUPTER_IMAN_IE | xHC_INTERRUPTER_IMAN_IP)
jne short @b
mov fs:[edi+eax+xHC_INTERRUPTER_IMAN],ebx
; get the interrupter ring
lea eax,[esi+USB_CONTROLLER->event_ring]
xhci_process_doorbell_loop:
; make ebx -> current Event TRB
mov ebx,es:[eax+xHCI_EVENT_RING->cur_trb]
mov xhci_event_cur_trb,ebx
mov ecx,fs:[ebx+xHCI_TRB->command]
push ecx
and cl,1
mov dl,es:[eax+xHCI_EVENT_RING->cycle_bit]
cmp cl,dl
pop ecx
jne xhci_process_doorbell_done_1
; =-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-
; eax -> xHCI_EVENT_RING
; ebx -> current TRB
; ecx = trb->command
; edx will -> original TRB that 'triggered' this event
test ecx,(1<<2) ; ED bit set?
jnz xhci_process_doorbell_ed
; =-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-
; ED bit cleared, so get the type and process the command
; make edx -> original TRB that 'triggered' this event
mov edx,fs:[ebx+xHCI_TRB->param]
and edx,(~0xF)
mov ecx,fs:[ebx+xHCI_TRB->status]
shr ecx,24
and cl,0x7F
cmp cl,TRB_SUCCESS
jne xhci_process_doorbell_not_success
; =-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-
; returned TRB_SUCCESS, so get type
mov ecx,fs:[ebx+xHCI_TRB->command]
shr ecx,10
and cl,0x3F
; =-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-
; NECs command completion?
cmp cl,NEC_TRB_TYPE_CMD_COMP
jne short @f
; get the type of the original TRB sent
mov ecx,fs:[edx+xHCI_TRB->command]
shr ecx,10
and cl,0x3F
cmp cl,NEC_TRB_TYPE_GET_FW
jne short xhci_process_nec_0
; it is the NEC get FW version
; major version is ((fs:[ebx+xHCI_TRB->status] & 0x0000FF00) >> 8)
; minor version is ((fs:[ebx+xHCI_TRB->status] & 0x000000FF) >> 0)
;mov ecx,fs:[ebx+xHCI_TRB->status] ; ecx = 0x____3021
;xchg cx,cx
jmp short xhci_process_compl_0
xhci_process_nec_0:
cmp cl,NEC_TRB_TYPE_GET_UN
jne short xhci_process_nec_1
; it is the NEC verification command
; org_trb->command = event_trb->command
mov ecx,fs:[ebx+xHCI_TRB->command]
mov fs:[edx+xHCI_TRB->command],ecx
jmp short xhci_process_compl_0
xhci_process_nec_1:
; unknown NEC completion
xchg cx,cx
jmp short xhci_process_compl_0
; =-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-
; Port status change?
@@: cmp cl,PORT_STATUS_CHANGE
jne short @f
; we don't do anything here
jmp xhci_process_doorbell_done_0
; =-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-
; Transfer Event?
@@: cmp cl,TRANS_EVENT
jne short @f
; this is an error: Transfer Event with ED = 0
jmp xhci_process_doorbell_done_0
; =-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-
; Command completion
@@: cmp cl,COMMAND_COMPLETION
jne short @f
mov ecx,fs:[edx+xHCI_TRB->command]
shr ecx,10
and cl,0x3F
cmp cl,ENABLE_SLOT
jne short xhci_process_compl_0