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RMII TX on a 8b port #88

@shuchitak

Description

@shuchitak

This has been implemented as part of #85. Further work is needed for validating the implementation.

  • Calculate RMII_ETHERNET_IFG_DELAY_ADJUSTMENT_8b adjustments. test_time_tx checks this
  • Possibly add timestamping in rmii_master_tx_pins_8b_asm and return values to XC. This should be OK as we can weave it into the end of the preamble and start of CRC where we have a few spare slots. May not be needed if we can close the above point
  • Possible safeguarding against Error:relocation R_XCORE1_CP_REL6 is out of range in ASM
  • Add support to 8b tx in rmii_phy.py
  • Extend tests to cover 8b tx case
  • Update docs to show how to use of 8b Tx ports, also additional memory usage of MAC (more than 1kB more due to LUT)
  • Code review

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