Merge pull request #153 from zyantific/reorder-fields

Minor improvements

Author: ZehMatt

tests/src/tests/tests.program.cpp

@@ -1,4 +1,5 @@
 #include <gtest/gtest.h>
+#include <zasm/testdata/x86/instructions.hpp>
 #include <zasm/zasm.hpp>
 
 namespace zasm::tests
@@ -369,4 +370,23 @@ namespace zasm::tests
         ASSERT_EQ(data, nullptr);
     }
 
+    // Test to ensure that we stay under 4 GiB of memory with a large number of instructions.
+    TEST(ProgramTests, Test1MillionInstructions)
+    {
+        Program program(MachineMode::AMD64);
+
+        x86::Assembler assembler(program);
+
+        constexpr auto kMaxInstructions = 1'000'000;
+
+        for (size_t i = 0; i < kMaxInstructions; i++)
+        {
+            const auto& instrEntry = data::Instructions[i % std::size(data::Instructions)];
+
+            ASSERT_EQ(instrEntry.emitter(assembler), ErrorCode::None) << instrEntry.instrBytes << ", " << instrEntry.operation;
+        }
+
+        ASSERT_EQ(program.size(), kMaxInstructions);
+    }
+
 } // namespace zasm::tests

zasm/include/zasm/base/instruction.hpp

@@ -41,8 +41,8 @@ namespace zasm
 
     protected:
         Attribs _attribs{};
-        OperandCount _opCount{};
         Mnemonic _mnemonic{};
+        OperandCount _opCount{};
         Type _type{};
 
     protected:

zasm/include/zasm/base/memory.hpp

@@ -14,30 +14,30 @@ namespace zasm
     {
         using RegisterPack = Packed<std::uint32_t, Reg::Id, 10>;
 
-        BitSize _bitSize{};
-        RegisterPack _segBaseIndex{};
-        std::uint8_t _scale{};
         std::int64_t _disp{};
+        RegisterPack _segBaseIndex{};
         Label::Id _label{ Label::Id::Invalid };
+        std::uint8_t _scale{};
+        BitSize _bitSize{};
 
     public:
         constexpr explicit Mem(
             BitSize bitSize, const Reg& seg, const Reg& base, const Reg& index, std::int32_t scale, std::int64_t disp) noexcept
-            : _bitSize{ bitSize }
+            : _disp{ disp }
             , _segBaseIndex{ seg.getId(), base.getId(), index.getId() }
             , _scale{ static_cast<std::uint8_t>(scale) }
-            , _disp{ disp }
+            , _bitSize{ bitSize }
         {
         }
 
         constexpr explicit Mem(
             BitSize bitSize, const Reg& seg, const Label& label, const Reg& base, const Reg& index, std::int32_t scale,
             std::int64_t disp) noexcept
-            : _bitSize{ bitSize }
+            : _disp{ disp }
             , _segBaseIndex{ seg.getId(), base.getId(), index.getId() }
-            , _scale{ static_cast<std::uint8_t>(scale) }
-            , _disp{ disp }
             , _label{ label.getId() }
+            , _scale{ static_cast<std::uint8_t>(scale) }
+            , _bitSize{ bitSize }
         {
         }