Adith Projects 🚀

This repository contains a collection of digital design and hardware description language (HDL) projects, primarily implemented using Verilog. These projects were developed for academic learning, hands-on practice, and portfolio demonstration.

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📌 Contents

• 8-bit ALU using Verilog
• Design Calculator using Verilog
• Vending Machine Controller
• Multi-bit Barrel Shifter
• FIFO Mode Design
• Traffic Light Control Unit
• Other supporting files and documentation

Each project folder contains Verilog source files, explains the design logic, and may include testbenches.

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🛠️ Technologies Used

• Verilog HDL
• Digital Logic Design
• Cadence / ModelSim / Vivado (simulation tools)
• Git & GitHub

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📂 Project Structure

adithprojects/
│
├── 8-bit ALU using Verilog/
├── Design Calculator Using Verilog/
├── Design Vending Machine using FSM/
├── Design multi bit Barrel Shifter/
├── FIFO mode design/
├── traffic light control unit/
│
├── .gitignore
├── LICENSE
└── README.md