Softcore-rs

Softcore-rs is a collection of CPU cores implemented as Rust libraries, translated directly from their respective ISA specifications. Currently a subset of RISC-V 64 is available, with ongoing work toward Armv9-A support.

Warning: The project is currently under development. The generated code does not provide any guarantees regarding completeness or correctness.

The soft cores are translated from the ISA specifications written in Sail through a custom Sail-to-Rust backend hosted in this repository. Because the Rust implementation is directly translated from the specification, the resulting cores can be used as a reference for testing low-level Rust software.

Cores

Architecture	Crate	Status
RISC-V 64		Experimental support
Armv9-A		Work in progress

Example

Soft cores can have a variety of use cases, notably for testing purposes. For instance, a soft core can be used to query hardware functions, such as checking if a load will succeed or result in a fault for a given hardware state.

use softcore_rv64::*;

let mut core = new_core(config::U74);
let addr = 0x8000_0000;
let access = raw::AccessType::Read(());

// Check the default access rights
assert!(
    core.pmp_check(addr, access).is_none(),
    "M-mode can access all memory by default"
);

core.set_mode(Privilege::User);
assert_eq!(
    core.pmp_check(addr, access),
    Some(ExceptionType::E_Load_Access_Fault(())),
    "U-mode has no access by default"
);