advance simtime after write in C++ and Verilog#341
Merged
pradeeban merged 1 commit intoControlCore-Project:devfrom Feb 18, 2026
Merged
advance simtime after write in C++ and Verilog#341pradeeban merged 1 commit intoControlCore-Project:devfrom
pradeeban merged 1 commit intoControlCore-Project:devfrom
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write_FM() and write_SM() in concore.hpp prepend simtime + delta to the data but never actually advance simtime after the write completes. Same bug in concore.v's writedata task. This breaks downstream readers that use simtime to detect fresh data since the timestamp never changes across writes in a loop
Python version does simtime += delta after write (line 421), so copying that behavior.
Closes #337