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Cyitron/README.md

Hello there ๐Ÿ‘‹

Welcome to my profile! ๐Ÿ‘‹ My name is Gabriel Lencina!

I am passionate about Hardware Engineering, with a particular interest in FPGA development, Verilog, VHDL, and embedded systems. I enjoy working on low-level programming and digital design, always looking for ways to optimize performance and push the boundaries of hardware efficiency. My goal is to develop innovative and high-performance solutions in the field of electronics and computing.



๐Ÿ“ฌ Connect with me:


๐Ÿ–ฅ๏ธ About Me:

  • ๐ŸŽ“ Computer Engineering student at UFSC
  • ๐Ÿ”ฌ Passionate about Hardware Design, FPGA, and Embedded Systems
  • โšก Skilled in Verilog, VHDL, C, C++, assembly, and low-level programming
  • ๐Ÿš€ Enthusiast of digital circuits, logic design, and hardware acceleration

Looking forward to collaborating on exciting projects! Feel free to reach out. ๐Ÿš€

Pinned Loading

  1. Inventory_LARM Inventory_LARM Public

    Logistic and Inventory system of LARM from UFSC Campus Araranguรก

  2. multiagents-course multiagents-course Public

    Forked from Liga-IA/template-mas

    ASL

  3. tcc-RS5 tcc-RS5 Public

    C