v1.0.3 Release

README.md

@@ -13,9 +13,18 @@ A variant which bypasses the mic-pipeline. Hence, the raw mic signal is streamed
 
 Firmware for debugging purposes only. It runs on the  XCORE.AI evaluation board. 
 
-**satellite1_usb_debug**
-
-Firmware for debugging purposes only. It enables basic logging on the satellite1 via usb-cdc. 
+**satellite1_usb_firmware_PIPELINE_CONFIGURATION**
+
+PIPELINE_CONFIGURATION:
+- aec__vnr_ic__ns__agc
+- aec__vnr_ic__ns
+- aec__vnr_ic
+- vnr_ic__ns
+- vnr_ic
+- ns
+
+Work in progress firmware, currently for debugging purposes only. 
+It configures the Satellite1 as an USB-Audio device and enables basic logging on the satellite1 via usb-cdc. 
 
 ## Firmware Files
 

satellite-xmos-firmware/audio_pipelines/reference/fixed_delay/audio_pipeline_t0.c

@@ -92,8 +92,10 @@ static void stage_vnr_and_ic(frame_data_t *frame_data)
 
     /* Intentionally ignoring comms ch from here on out */
     memcpy(frame_data->samples[0], ic_output, appconfAUDIO_PIPELINE_FRAME_ADVANCE * sizeof(int32_t));
+#if appconfAUDIO_PIPELINE_STORE_IC_AUDIO    
     memcpy(frame_data->aec_reference_audio_samples[0], ic_output, appconfAUDIO_PIPELINE_FRAME_ADVANCE * sizeof(int32_t));   // Store the interference cancelled audio in the first reference channel
 #endif
+#endif
 }
 
 static void stage_ns(frame_data_t *frame_data)
@@ -107,8 +109,10 @@ static void stage_ns(frame_data_t *frame_data)
                 ns_output,
                 frame_data->samples[0]);
     memcpy(frame_data->samples[0], ns_output, appconfAUDIO_PIPELINE_FRAME_ADVANCE * sizeof(int32_t));
+#if appconfAUDIO_PIPELINE_STORE_NS_AUDIO
     memcpy(frame_data->aec_reference_audio_samples[1], ns_output, appconfAUDIO_PIPELINE_FRAME_ADVANCE * sizeof(int32_t));   // Store NS audio in the second reference channel
 #endif
+#endif
 }
 
 static void stage_agc(frame_data_t *frame_data)

satellite-xmos-firmware/bsp_config/SATELLITE1/SATELLITE1_USB.cmake → satellite-xmos-firmware/bsp_config/SATELLITE1-USB/SATELLITE1-USB.cmake

@@ -1,39 +1,48 @@
 
 ## Create custom board targets for application
-add_library(sln_voice_app_ffva_board_support_satellite1 INTERFACE)
-target_sources(sln_voice_app_ffva_board_support_satellite1
+add_library(fph_ffva_board_support_satellite1_usb INTERFACE)
+target_sources(fph_ffva_board_support_satellite1_usb
     INTERFACE
-        ${CMAKE_CURRENT_LIST_DIR}/platform/dac_port.c
         ${CMAKE_CURRENT_LIST_DIR}/platform/app_pll_ctrl.c
         ${CMAKE_CURRENT_LIST_DIR}/platform/driver_instances.c
         ${CMAKE_CURRENT_LIST_DIR}/platform/platform_init.c
         ${CMAKE_CURRENT_LIST_DIR}/platform/platform_start.c
 )
-target_include_directories(sln_voice_app_ffva_board_support_satellite1
+target_include_directories(fph_ffva_board_support_satellite1_usb
     INTERFACE
         ${CMAKE_CURRENT_LIST_DIR}
 )
-target_link_libraries(sln_voice_app_ffva_board_support_satellite1
+target_link_libraries(fph_ffva_board_support_satellite1_usb
     INTERFACE
         core::general
         rtos::freertos
         rtos::drivers::general
-        #rtos::drivers::audio
-        rtos::drivers::mic_array
-        fph::i2s_sync
         rtos::drivers::usb
         rtos::drivers::dfu_image
-        sln_voice::app::ffva::dac::aic3204
+        fph::rtos_mic_array
+        fph::i2s_sync
+        fph::rtos_ws2812
 )
-target_compile_options(sln_voice_app_ffva_board_support_satellite1
+target_compile_options(fph_ffva_board_support_satellite1_usb
     INTERFACE
-        ${CMAKE_CURRENT_LIST_DIR}/SATTELITE1.xn
+        ${CMAKE_CURRENT_LIST_DIR}/SATELLITE1.xn
 )
-target_link_options(sln_voice_app_ffva_board_support_satellite1
+target_link_options(fph_ffva_board_support_satellite1_usb
     INTERFACE
-        ${CMAKE_CURRENT_LIST_DIR}/SATTELITE1.xn
+        ${CMAKE_CURRENT_LIST_DIR}/SATELLITE1.xn
 )
-target_compile_definitions(sln_voice_app_ffva_board_support_satellite1
+
+# MICS: 
+# North: 0 (pin 0 falling edge) 
+# South: 1 (pin 1 falling edge) 
+# East:  4 (pin 0 rising edge ) 
+# West:  5 (pin 1 rising edge )
+# pins 2 & 3 are not used
+
+# use East as first and West as second mic
+set(MIC_MAPPING "4, 5")
+
+target_compile_definitions(fph_ffva_board_support_satellite1_usb
     INTERFACE
         XCOREAI_EXPLORER=1
         PLATFORM_SUPPORTS_TILE_0=1
@@ -46,7 +55,11 @@ target_compile_definitions(sln_voice_app_ffva_board_support_satellite1
         MIC_ARRAY_CONFIG_MCLK_FREQ=24576000
         MIC_ARRAY_CONFIG_PDM_FREQ=3072000
         MIC_ARRAY_CONFIG_SAMPLES_PER_FRAME=240
+        MIC_ARRAY_CONFIG_USE_DDR=1
+        MIC_ARRAY_CONFIG_MIC_INPUT=8
         MIC_ARRAY_CONFIG_MIC_COUNT=2
+        MIC_ARRAY_CONFIG_INPUT_MAPPING={${MIC_MAPPING}}
+
         MIC_ARRAY_CONFIG_CLOCK_BLOCK_A=XS1_CLKBLK_1
         MIC_ARRAY_CONFIG_CLOCK_BLOCK_B=XS1_CLKBLK_2
         MIC_ARRAY_CONFIG_PORT_MCLK=PORT_MCLK_IN
@@ -55,4 +68,4 @@ target_compile_definitions(sln_voice_app_ffva_board_support_satellite1
 )
 
 ## Create an alias
-add_library(sln_voice::app::ffva::satellite1 ALIAS sln_voice_app_ffva_board_support_satellite1)
+add_library(fph::ffva::satellite1-usb ALIAS fph_ffva_board_support_satellite1_usb)

satellite-xmos-firmware/bsp_config/SATELLITE1-USB/SATELLITE1.xn

@@ -0,0 +1,84 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<Network xmlns="http://www.xmos.com"
+         xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
+         xsi:schemaLocation="http://www.xmos.com http://www.xmos.com">
+  <Type>Board</Type>
+  <Name>FutureProofHomes Satellite1</Name>
+
+  <Declarations>
+    <Declaration>tileref tile[2]</Declaration>
+  </Declarations>
+
+  <Packages>
+    <Package id="0" Type="XS3-UnA-1024-QF60B">
+      <Nodes>
+        <Node Id="0" InPackageId="0" Type="XS3-L16A-1024" Oscillator="24MHz" SystemFrequency="600MHz" ReferenceFrequency="100MHz">
+          <Boot>
+            <Source Location="bootFlash"/>
+          </Boot>
+
+          <Tile Number="0" Reference="tile[0]">
+            <!-- Primary SPI -->
+            <Port Location="XS1_PORT_1B" Name="PORT_SQI_CS"/>
+            <Port Location="XS1_PORT_1C" Name="PORT_SQI_SCLK"/>
+            <Port Location="XS1_PORT_4B" Name="PORT_SQI_SIO"/>
+
+            <!-- Secondary SPI -->
+            <Port Location="XS1_PORT_1A" Name="PORT_XSPI_CS"/>
+            <Port Location="XS1_PORT_1L" Name="PORT_XSPI_CLK"/>
+            <Port Location="XS1_PORT_1M" Name="PORT_XSPI_MISO"/>
+            <Port Location="XS1_PORT_1P" Name="PORT_XSPI_MOSI"/>
+
+            <!-- I2C -->
+            <Port Location="XS1_PORT_1N" Name="PORT_I2C_SCL"/>
+            <Port Location="XS1_PORT_1O" Name="PORT_I2C_SDA"/>
+
+            <!-- User Input -->
+            <Port Location="XS1_PORT_4F" Name="PORT_ROTARY_ENC"/>
+            <Port Location="XS1_PORT_8D" Name="PORT_BUTTONS"/>
+          </Tile>
+
+          <Tile Number="1" Reference="tile[1]">
+            <!-- Mic related ports -->
+            <Port Location="XS1_PORT_1G" Name="PORT_PDM_CLK"/>
+            <Port Location="XS1_PORT_4D" Name="PORT_PDM_DATA"/>
+
+            <!-- Audio ports -->
+            <Port Location="XS1_PORT_1D" Name="PORT_MCLK_IN"/>
+            <Port Location="XS1_PORT_1C" Name="PORT_I2S_BCLK"/>
+            <Port Location="XS1_PORT_1B" Name="PORT_I2S_LRCLK"/>
+            <Port Location="XS1_PORT_1F" Name="PORT_I2S_DIN"/>
+            <Port Location="XS1_PORT_1K" Name="PORT_I2S_DOUT1"/>
+            <Port Location="XS1_PORT_1A" Name="PORT_I2S_DOUT2"/>
+
+            <!-- LED ring -->
+            <Port Location="XS1_PORT_4A" Name="PORT_LED_RING"/>
+          </Tile>
+        </Node>
+      </Nodes>
+    </Package>
+  </Packages>
+  <Nodes>
+    <Node Id="2" Type="device:" RoutingId="0x8000">
+      <Service Id="0" Proto="xscope_host_data(chanend c);">
+        <Chanend Identifier="c" end="3"/>
+      </Service>
+    </Node>
+  </Nodes>
+  <Links>
+    <Link Encoding="2wire" Delays="5clk" Flags="XSCOPE">
+      <LinkEndpoint NodeId="0" Link="XL0"/>
+      <LinkEndpoint NodeId="2" Chanend="1"/>
+    </Link>
+  </Links>
+  <ExternalDevices>
+    <Device NodeId="0" Tile="0" Class="SQIFlash" Name="bootFlash" Type="W25Q64JV" PageSize="256" SectorSize="4096" NumPages="32768">
+      <Attribute Name="PORT_SQI_CS" Value="PORT_SQI_CS"/>
+      <Attribute Name="PORT_SQI_SCLK" Value="PORT_SQI_SCLK"/>
+      <Attribute Name="PORT_SQI_SIO" Value="PORT_SQI_SIO"/>
+     </Device>
+  </ExternalDevices>
+  <JTAGChain>
+    <JTAGDevice NodeId="0"/>
+  </JTAGChain>
+</Network>

satellite-xmos-firmware/bsp_config/SATELLITE1-USB/platform/app_pll_ctrl.c

@@ -0,0 +1,51 @@
+// Copyright 2022-2023 XMOS LIMITED.
+// This Software is subject to the terms of the XMOS Public Licence: Version 1.
+
+/* System headers */
+#include <platform.h>
+#include <xs1.h>
+#include <xcore/hwtimer.h>
+#include <xcore/assert.h>
+
+/* App headers */
+#include "platform/app_pll_ctrl.h"
+
+void app_pll_set_numerator(int numerator)
+{
+    const unsigned tileid = get_local_tile_id();
+    uint32_t fracval = APP_PLL_FRAC_NOM & 0xFFFF00FF;
+    uint32_t f;
+
+    if (numerator > 255) {
+        f = 255;
+    } else if (numerator < 0) {
+        f = 0;
+    } else {
+        f = numerator;
+    }
+
+    fracval |= (f << 8);
+    write_sswitch_reg_no_ack(tileid, XS1_SSWITCH_SS_APP_PLL_FRAC_N_DIVIDER_NUM, fracval);
+}
+
+void app_pll_init(void)
+{
+    unsigned tileid = get_local_tile_id();
+
+    const unsigned APP_PLL_DISABLE = 0x0201FF04;
+    const unsigned APP_PLL_DIV_0   = 0x80000004;
+
+    write_sswitch_reg(tileid, XS1_SSWITCH_SS_APP_PLL_CTL_NUM, APP_PLL_DISABLE);
+
+    hwtimer_t tmr = hwtimer_alloc();
+    {
+        xassert(tmr != 0);
+        hwtimer_delay(tmr, 100000); // 1ms with 100 MHz timer tick
+    }
+    hwtimer_free(tmr);
+
+    write_sswitch_reg(tileid, XS1_SSWITCH_SS_APP_PLL_CTL_NUM, APP_PLL_CTL_VAL);
+    write_sswitch_reg(tileid, XS1_SSWITCH_SS_APP_PLL_CTL_NUM, APP_PLL_CTL_VAL);
+    write_sswitch_reg(tileid, XS1_SSWITCH_SS_APP_PLL_FRAC_N_DIVIDER_NUM, APP_PLL_FRAC_NOM);
+    write_sswitch_reg(tileid, XS1_SSWITCH_SS_APP_CLK_DIVIDER_NUM, APP_PLL_DIV_0);
+}

satellite-xmos-firmware/bsp_config/SATELLITE1-USB/platform/app_pll_ctrl.h

@@ -0,0 +1,19 @@
+// Copyright 2022-2023 XMOS LIMITED.
+// This Software is subject to the terms of the XMOS Public Licence: Version 1.
+
+#ifndef APP_PLL_CTRL_H_
+#define APP_PLL_CTRL_H_
+
+#include "platform_conf.h"
+
+#if (MIC_ARRAY_CONFIG_MCLK_FREQ != 24576000)
+#error PLL values only valid if MIC_ARRAY_CONFIG_MCLK_FREQ == 24576000
+#endif
+
+#define APP_PLL_CTL_VAL   0x0A019803 // Valid for all fractional values
+#define APP_PLL_FRAC_NOM  0x800095F9 // 24.576000 MHz
+
+void app_pll_set_numerator(int numerator);
+void app_pll_init(void);
+
+#endif /* APP_PLL_CTRL_H_ */

satellite-xmos-firmware/bsp_config/SATELLITE1-USB/platform/driver_instances.c

@@ -0,0 +1,40 @@
+// Copyright 2022-2023 XMOS LIMITED.
+// This Software is subject to the terms of the XMOS Public Licence: Version 1.
+
+#include "platform/driver_instances.h"
+
+static rtos_intertile_t intertile_ctx_s;
+rtos_intertile_t *intertile_ctx = &intertile_ctx_s;
+
+static rtos_intertile_t intertile_usb_audio_ctx_s;
+rtos_intertile_t *intertile_usb_audio_ctx = &intertile_usb_audio_ctx_s;
+
+static rtos_qspi_flash_t qspi_flash_ctx_s;
+rtos_qspi_flash_t *qspi_flash_ctx = &qspi_flash_ctx_s;
+
+static rtos_gpio_t gpio_ctx_t0_s;
+rtos_gpio_t *gpio_ctx_t0 = &gpio_ctx_t0_s;
+
+static rtos_gpio_t gpio_ctx_t1_s;
+rtos_gpio_t *gpio_ctx_t1 = &gpio_ctx_t1_s;
+
+static rtos_mic_array_t mic_array_ctx_s;
+rtos_mic_array_t *mic_array_ctx = &mic_array_ctx_s;
+
+static rtos_i2s_t i2s_ctx_s;
+rtos_i2s_t *i2s_ctx = &i2s_ctx_s;
+
+static rtos_spi_slave_t spi_slave_ctx_s;
+rtos_spi_slave_t *spi_slave_ctx = &spi_slave_ctx_s;
+
+static rtos_dfu_image_t dfu_image_ctx_s;
+rtos_dfu_image_t *dfu_image_ctx = &dfu_image_ctx_s;
+
+static rtos_ws2812_t ws2812_ctx_s;
+rtos_ws2812_t *ws2812_ctx = &ws2812_ctx_s;
+
+static device_control_t device_control_spi_ctx_s;
+device_control_t *device_control_spi_ctx = &device_control_spi_ctx_s;
+
+static device_control_gpio_ctx_t device_control_gpio_ctx_s;
+device_control_gpio_ctx_t *device_control_gpio_ctx = &device_control_gpio_ctx_s;

satellite-xmos-firmware/bsp_config/SATELLITE1-USB/platform/driver_instances.h

@@ -0,0 +1,65 @@
+// Copyright 2022-2023 XMOS LIMITED.
+// This Software is subject to the terms of the XMOS Public Licence: Version 1.
+
+#ifndef DRIVER_INSTANCES_H_
+#define DRIVER_INSTANCES_H_
+
+#include "rtos_gpio.h"
+#include "rtos_intertile.h"
+#include "rtos_i2s.h"
+#include "rtos_mic_array.h"
+#include "rtos_qspi_flash.h"
+#include "rtos_dfu_image.h"
+#include "rtos_spi_slave.h"
+
+#include <platform.h>
+#include "rtos_ws2812.h"
+#include "device_control.h"
+#include "gpio/gpio_servicer.h"
+
+/* Tile specifiers */
+#define FLASH_TILE_NO      0
+#define SPI_CLIENT_TILE_NO 0
+
+#define MICARRAY_TILE_NO   1
+#define I2S_TILE_NO        1
+#define SPEAKER_PIPELINE_TILE_NO I2S_TILE_NO 
+#define WS2812_TILE_NO     1
+
+
+/** TILE 0 Clock Blocks */
+#define FLASH_CLKBLK  XS1_CLKBLK_1
+#define MCLK_CLKBLK   XS1_CLKBLK_2
+#define SPI_CLKBLK    XS1_CLKBLK_3
+#define XUD_CLKBLK_1  XS1_CLKBLK_4 /* Reserved for lib_xud */
+#define XUD_CLKBLK_2  XS1_CLKBLK_5 /* Reserved for lib_xud */
+
+/** TILE 1 Clock Blocks */
+#define PDM_CLKBLK_1  XS1_CLKBLK_1
+#define PDM_CLKBLK_2  XS1_CLKBLK_2
+#define I2S_CLKBLK    XS1_CLKBLK_3
+// #define UNUSED_CLKBLK XS1_CLKBLK_4
+// #define UNUSED_CLKBLK XS1_CLKBLK_5
+
+/* Port definitions */
+#define PORT_MCLK           PORT_MCLK_IN
+
+/*LED RING*/
+#define LED_RING_NUM_LEDS   24
+#define LED_RING_PORT_PIN    3
+
+extern rtos_intertile_t *intertile_ctx;
+extern rtos_intertile_t *intertile_usb_audio_ctx;
+extern rtos_qspi_flash_t *qspi_flash_ctx;
+extern rtos_gpio_t *gpio_ctx_t0;
+extern rtos_gpio_t *gpio_ctx_t1;
+extern rtos_mic_array_t *mic_array_ctx;
+extern rtos_spi_slave_t *spi_slave_ctx;
+extern rtos_i2s_t *i2s_ctx;
+extern rtos_dfu_image_t *dfu_image_ctx;
+extern rtos_ws2812_t *ws2812_ctx;
+
+extern device_control_t *device_control_spi_ctx;
+extern device_control_gpio_ctx_t *device_control_gpio_ctx;
+
+#endif /* DRIVER_INSTANCES_H_ */