A homebrew PC built from discrete 74-series logic chips. GPU, CPU and motherboard from scratch.
A personal computer built entirely from individual logic chips -- the same 74-series ICs that powered computing in the 1970s and 80s. No FPGAs. No system-on-chips. Every register, every counter, every multiplexer is a physical chip on a custom PCB.
The only microcontroller in the entire system is a small ATmega328P that bridges SPI communication on the GPU module. Everything else -- the graphics pipeline, the CPU, the bus logic -- is discrete.
┌─────────────┐ SPI Bus ┌─────────────┐
│ Raspberry Pi │◄────────────────►│ GPU Module │──── VGA Out ──► Monitor
│ (Dev Host) │ │ │
└─────────────┘ └─────────────┘
╌╌╌ Phase 1: GPU development against Pi ╌╌╌
┌─────────────┐ ┌─────────────┐
│ CPU Module │◄── System Bus ──►│ GPU Module │──── VGA Out ──► Monitor
│ (74-series) │ │ │ │
└─────────────┘ │ └─────────────┘
│
┌───────┴───────┐
│ Motherboard │
│ RAM / ROM │
│ UART │
│ Addr Decode │
│ Clock / Power │
└───────────────┘
╌╌╌ Phase 2+: Full homebrew computer ╌╌╌
640x480 VGA output from discrete logic. 256 colors. Custom drawing commands. Connects to a Raspberry Pi over SPI for development, or to the homebrew CPU via system bus.
| Spec | Value |
|---|---|
| Resolution | 640 x 480 @ 60Hz |
| Color | 8-bit indexed, 256-entry 18-bit palette |
| VRAM | 512KB SRAM (10ns access time) |
| Pixel Clock | 25.175 MHz |
| VRAM Clock | ~50.35 MHz (interleaved dual-access) |
| Host Interface | SPI (to Pi) or 8-bit parallel system bus |
| Video Output | Analog VGA via 6-bit R-2R DAC |
| Drawing Commands | 14 commands (pixel, line, rect, fill, blit, scroll, text, palette) |
| Logic Family | 74AC (high-speed path), 74HCT (control) |
GPU Documentation
gpu/docs/architecture.md-- Block diagram and theory of operationgpu/docs/command-set.md-- SPI command protocol (14 commands)gpu/docs/vga-timing.md-- VGA signal timing and R-2R DAC designgpu/docs/memory-map.md-- VRAM layout, palette RAM, internal registersgpu/docs/bom.md-- Bill of materials (~$48-84 estimated)
Custom instruction set. ALU built from 74181 bit-slice chips. Register file, program counter and EEPROM-based microcode control unit -- all on a single PCB that plugs into the motherboard.
40-pin system bus, address decoding, clock distribution, power regulation, 32KB RAM, 16KB ROM and UART serial terminal.
System Documentation
motherboard/docs/bus-standard.md-- 40-pin bus specification with timing diagramsmotherboard/docs/design-decisions.md-- Design rationale log (8 decisions documented)
project-74xxpixel-forge/
│
├── gpu/ ← ACTIVE
│ ├── docs/ 5 design documents
│ ├── schematics/ KiCad schematics
│ ├── pcb/ KiCad PCB layout
│ ├── firmware/ EEPROM microcode + lookup tables
│ └── software/ Raspberry Pi SPI driver
│
├── cpu/ ← PHASE 2
│ ├── docs/
│ ├── schematics/
│ ├── pcb/
│ └── firmware/
│
├── motherboard/ ← PHASE 3
│ ├── docs/ Bus standard + design decisions
│ ├── schematics/
│ ├── pcb/
│ └── firmware/
│
├── README.md
├── LICENSE
└── .gitignore
| Principle | Detail | |
|---|---|---|
| 1 | Discrete logic over microcontrollers | The CPU and GPU pipeline are 74-series chips. No hidden MCU doing the real work. |
| 2 | Modular | Each module is a self-contained PCB with a defined bus interface. Develop and test independently. |
| 3 | GPU-first | Test against a Raspberry Pi over SPI before the CPU or motherboard exist. |
| 4 | Documented for learning | Every decision explained with alternatives and reasoning. |
| Module | Estimated Cost | Status |
|---|---|---|
| GPU | $48 - $84 | Documented |
| CPU | TBD | Planned |
| Motherboard | TBD | Planned |
Costs assume sourcing from LCSC/JLCPCB. PCB fabrication included.
| Tool | Purpose |
|---|---|
| KiCad | Schematic capture and PCB layout |
| Logic Analyzer | Bus signal debugging |
| Oscilloscope | VGA timing verification |
| Raspberry Pi | GPU development host (SPI) |
| TL866II+ | EEPROM programmer for microcode |
| Project | What I learned |
|---|---|
| Ben Eater's 8-bit computer | Discrete logic CPU fundamentals |
| bitluni's RISC-V Supercluster | Parallel microcontroller clustering |
| Gigatron TTL computer | TTL-only computer with VGA output |
| Classic VGA chipsets (V9938, TMS9918) | Palette-based graphics architecture |
- Define GPU architecture and command set
- Define system bus standard (40-pin)
- Document VGA timing and memory map
- Bill of materials
- GPU KiCad schematics -- VGA scanout engine
- GPU KiCad schematics -- command processor
- GPU KiCad schematics -- SPI interface
- GPU PCB layout
- GPU fabrication and assembly
- Raspberry Pi SPI driver and test patterns
- GPU bring-up and VGA output test
- CPU architecture and instruction set design
- Motherboard schematic and PCB
- Full system integration
Hardware designs and associated source files are distributed under the CERN-OHL-W v2. See the LICENSE file for full legal details.
Copyright 2026 Herorif
This source describes Open Hardware. You may redistribute and modify this source and make products using it under the terms of the CERN Open Hardware Licence Version 2 (Weakly Reciprocal). Build one yourself.
Built with 74xx logic, solder and boredom