The goal of this design is to use the PYNQ-Z2 development board to design a general convolution neural network accelerator. And through real-time handwritten digits input and MNIST test data set to verify the correctness and accuracy of the system.
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The goal of this design is to use the PYNQ-Z2 development board to design a general convolution neural network accelerator. And through real-time handwritten digits input and MNIST test data set to verify the correctness and accuracy of the system.
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Jiawei888/FPGA-CNN-Accelerator
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The goal of this design is to use the PYNQ-Z2 development board to design a general convolution neural network accelerator. And through real-time handwritten digits input and MNIST test data set to verify the correctness and accuracy of the system.
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