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[common] Generalized MXFP8 fused kernels w.r.t. input tensor dimensions #1437
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Open
[common] Generalized MXFP8 fused kernels w.r.t. input tensor dimensions #1437
Oleg-Goncharov
wants to merge
10
commits into
NVIDIA:release_v2.0
from
Oleg-Goncharov:pr_mxfp8_generalization
+132
−39
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Signed-off-by: Oleg Goncharov <[email protected]>
for more information, see https://pre-commit.ci
timmoon10
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Jan 29, 2025
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Mostly LGTM. It looks like this is needed before we can merge #1435.
Co-authored-by: Tim Moon <[email protected]> Signed-off-by: Oleg Goncharov <[email protected]>
for more information, see https://pre-commit.ci
Signed-off-by: Oleg Goncharov <[email protected]>
…sed by to string conversion) Signed-off-by: Oleg Goncharov <[email protected]>
for more information, see https://pre-commit.ci
Co-authored-by: Tim Moon <[email protected]> Signed-off-by: Oleg Goncharov <[email protected]>
for more information, see https://pre-commit.ci
Signed-off-by: Oleg Goncharov <[email protected]>
ptrendx
approved these changes
Jan 31, 2025
Pipeline 23264050 |
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Description
Lifted restrictions on input tensor dimensions in MXFP8 fused kernels, allowing arbitrary number of rows (or the product of all tensor dimensions except the last of high-dimensional tensors).
The number of columns (or the dimensionality of the last dimension of high-dimensional tensors) must satisfy the memory alignment requirement for Tensor Memory Accelerator (TMA) to be a multiple of 16 bytes.
Type of change
Changes
Removed the
isFullTile
requirement in themxfp8_quantize
functionAdded 16-byte alignment check when creating a TMA descriptor
MXFP8 Test Suite: Added the alignment/padding requirement for dimensions of the tensors with scaling factors to be multiples of [128,4] for row-wise and [4,128] for column-wise scaling.
Checklist: