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@vcoracolombo vcoracolombo self-assigned this Jan 14, 2022
@vcoracolombo vcoracolombo force-pushed the vccolombo-hash branch 2 times, most recently from 91060d0 to 5d6b078 Compare January 24, 2022 11:22
@vcoracolombo vcoracolombo force-pushed the vccolombo-hash branch 2 times, most recently from 02e5b07 to 5b556e4 Compare March 8, 2022 17:01
@vcoracolombo vcoracolombo marked this pull request as ready for review March 31, 2022 19:31
Implementation for instructions hashst, hashchk, and its privileged
versions.

Signed-off-by: Víctor Colombo <[email protected]>
Comment on lines +2182 to +2185
for (int i = 3; i >= 0; i--) {
k[i] = key & 0xffff;
key >>= 16;
}
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Hum... it's hard to tell if the pseudo-code is using PowerISA-indexing or everybody-else-indexing. The original paper uses "k[m-1]..k[0] = key words," so I'd expect k[0] to be the least significant halfword.

xright[0] = (x >> 16) & 0xffff;

for (int i = 0; i < 28; i++) {
z |= ((z0 >> (63 - i)) & 1) << 48;
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It seems that z is set in each iteration, so I think it's not a |=. Also, why << 48?

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<< 48 was because it's setting 15th bit and I assumed it was a 64 bit variable, but it's uint16. Fixed by removing it for now, but I have yet to take a look into the bit ordering issue

return 0;
}

tcg_gen_addi_tl(ea, cpu_gpr[a->ra], a->rt);
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"If RA=0, the instruction form is invalid."
Also, if NARROW_MODE(ctx), we need a tcg_gen_ext32u_tl(ea, ea).

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Fixed in 7c4ee64

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2 participants