Add tests for hashst and hashchk #70
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New macros that add FLAGS and FLAGS2 checking were added for both TRANS and TRANS64. Signed-off-by: Luis Pires <[email protected]> [ferst: - TRANS_FLAGS2 instead of TRANS_FLAGS_E - Use the new macros in load/store vector insns ] Signed-off-by: Matheus Ferst <[email protected]> Reviewed-by: Richard Henderson <[email protected]> Signed-off-by: Víctor Colombo <[email protected]>
Moved the instructions vmulesb, vmulosb, vmuleub, vmuloub, vmulesh, vmulosh, vmuleuh, vmulouh, vmulesw, vmulosw, muleuw and vmulouw from legacy to decodetree. Implemented the instructions vmulesd, vmulosd, vmuleud, vmuloud. Signed-off-by: Lucas Mateus Castro (alqotel) <[email protected]> Signed-off-by: Matheus Ferst <[email protected]> Signed-off-by: Víctor Colombo <[email protected]>
Moved instructions vmulld, vmulhuw, vmulhsw, vmulhud and vmulhsd to decodetree Signed-off-by: Lucas Mateus Castro (alqotel) <[email protected]> Signed-off-by: Matheus Ferst <[email protected]> Signed-off-by: Víctor Colombo <[email protected]>
Changed vmulhuw, vmulhud, vmulhsw, vmulhsd to use gvec instructions Signed-off-by: Lucas Mateus Castro (alqotel) <[email protected]> Signed-off-by: Matheus Ferst <[email protected]> Signed-off-by: Víctor Colombo <[email protected]>
Based on [1] by Lijun Pan <[email protected]>, which was never merged into master. [1]: https://lists.gnu.org/archive/html/qemu-ppc/2020-07/msg00419.html Signed-off-by: Víctor Colombo <[email protected]> Signed-off-by: Matheus Ferst <[email protected]>
Based on [1] by Lijun Pan <[email protected]>, which was never merged into master. [1]: https://lists.gnu.org/archive/html/qemu-ppc/2020-07/msg00419.html Signed-off-by: Víctor Colombo <[email protected]> Signed-off-by: Matheus Ferst <[email protected]>
Move the following instructions to decodetree: vextsb2w: Vector Extend Sign Byte To Word vextsh2w: Vector Extend Sign Halfword To Word vextsb2d: Vector Extend Sign Byte To Doubleword vextsh2d: Vector Extend Sign Halfword To Doubleword vextsw2d: Vector Extend Sign Word To Doubleword Signed-off-by: Lucas Coutinho <[email protected]> Signed-off-by: Matheus Ferst <[email protected]> Signed-off-by: Víctor Colombo <[email protected]>
Signed-off-by: Lucas Coutinho <[email protected]> Signed-off-by: Matheus Ferst <[email protected]> Signed-off-by: Víctor Colombo <[email protected]>
…etree Signed-off-by: Matheus Ferst <[email protected]> Signed-off-by: Víctor Colombo <[email protected]>
Signed-off-by: Matheus Ferst <[email protected]> Signed-off-by: Víctor Colombo <[email protected]>
Implement the following PowerISA v3.1 instructions: vcmpequq Vector Compare Equal Quadword Signed-off-by: Matheus Ferst <[email protected]> Signed-off-by: Víctor Colombo <[email protected]>
Implement the following PowerISA v3.1 instructions: vcmpgtsq: Vector Compare Greater Than Signed Quadword vcmpgtuq: Vector Compare Greater Than Unsigned Quadword Signed-off-by: Matheus Ferst <[email protected]> Signed-off-by: Víctor Colombo <[email protected]>
Implement the following PowerISA v3.1 instructions: vcmpsq: Vector Compare Signed Quadword vcmpuq: Vector Compare Unsigned Quadword Signed-off-by: Matheus Ferst <[email protected]> Signed-off-by: Víctor Colombo <[email protected]>
Signed-off-by: Matheus Ferst <[email protected]> Signed-off-by: Víctor Colombo <[email protected]>
Signed-off-by: Matheus Ferst <[email protected]> Signed-off-by: Víctor Colombo <[email protected]>
Signed-off-by: Matheus Ferst <[email protected]> Signed-off-by: Víctor Colombo <[email protected]>
Signed-off-by: Matheus Ferst <[email protected]> Signed-off-by: Víctor Colombo <[email protected]>
Signed-off-by: Matheus Ferst <[email protected]> Signed-off-by: Víctor Colombo <[email protected]>
Signed-off-by: Víctor Colombo <[email protected]>
Signed-off-by: Víctor Colombo <[email protected]>
Signed-off-by: Víctor Colombo <[email protected]>
Signed-off-by: Víctor Colombo <[email protected]>
Signed-off-by: Víctor Colombo <[email protected]>
Following the implementation of tcg_gen_gvec_3i, add a four-vector and immediate operand expansion method. Signed-off-by: Víctor Colombo <[email protected]>
Signed-off-by: Víctor Colombo <[email protected]>
Signed-off-by: Víctor Colombo <[email protected]>
Signed-off-by: Víctor Colombo <[email protected]>
Implement the following PowerISA v3.0 instuctions:
xsmaddqp[o]: VSX Scalar Multiply-Add Quad-Precision [using round to Odd]
xsmsubqp[o]: VSX Scalar Multiply-Subtract Quad-Precision [using round
to Odd]
xsnmaddqp[o]: VSX Scalar Negative Multiply-Add Quad-Precision [using
round to Odd]
xsnmsubqp[o]: VSX Scalar Negative Multiply-Subtract Quad-Precision
[using round to Odd]
Signed-off-by: Víctor Colombo <[email protected]>
Signed-off-by: Víctor Colombo <[email protected]>
xscmpnedp was added in ISA v3.0 but removed in v3.0B. This patch removes this instruction as it was not in the final version of v3.0. Signed-off-by: Víctor Colombo <[email protected]> Acked-by: Greg Kurz <[email protected]> Reviewed-by: Cédric Le Goater <[email protected]> Reviewed-by: Richard Henderson <[email protected]>
Refactor VSX_SCALAR_CMP_DP, changing its name to VSX_SCALAR_CMP and prepare the helper to be used for quadword comparisons. Signed-off-by: Víctor Colombo <[email protected]>
Signed-off-by: Víctor Colombo <[email protected]>
do_helper_XX3 is a wrapper for instructions that only call its helper. It will be used later to implement instructions like xscmp*dp. Signed-off-by: Víctor Colombo <[email protected]>
Signed-off-by: Víctor Colombo <[email protected]>
Also, fixes these instructions not being capitalized. Signed-off-by: Víctor Colombo <[email protected]>
Refactor xs{max,min}cdp VSX_MAX_MINC helper to prepare for
xs{max,min}cqp implementation.
Signed-off-by: Víctor Colombo <[email protected]>
Signed-off-by: Víctor Colombo <[email protected]>
Signed-off-by: Víctor Colombo <[email protected]>
Signed-off-by: Víctor Colombo <[email protected]>
Signed-off-by: Víctor Colombo <[email protected]>
Signed-off-by: Víctor Colombo <[email protected]>
Signed-off-by: Víctor Colombo <[email protected]>
Signed-off-by: Víctor Colombo <[email protected]>
Signed-off-by: Víctor Colombo <[email protected]>
Implementation for instructions hashst, hashchk, and its privileged versions. Signed-off-by: Víctor Colombo <[email protected]>
Handle POWERPC_EXCP_TRAP in cpu_loop to deliver SIGTRAP on tw[i]/td[i]. The si_code comes from do_program_check in the kernel source file arch/powerpc/kernel/traps.c Reviewed-by: Richard Henderson <[email protected]> Signed-off-by: Matheus Ferst <[email protected]>
Now that linux-user delivers the signal on tw, we can change signal_save_restore_xer to use SIGTRAP instead of SIGILL. Suggested-by: Richard Henderson <[email protected]> Reviewed-by: Richard Henderson <[email protected]> Signed-off-by: Matheus Ferst <[email protected]>
The code in linux-user/ppc/cpu_loop.c expects POWERPC_EXCP_PRIV exception with error POWERPC_EXCP_PRIV_OPC or POWERPC_EXCP_PRIV_REG, while POWERPC_EXCP_INVAL_SPR is expected in POWERPC_EXCP_INVAL exceptions. This mismatch caused an EXCP_DUMP with the message "Unknown privilege violation (03)", as seen in [1]. Fixes: 9b2fadd ("ppc: Rework generation of priv and inval interrupts") Resolves: https://gitlab.com/qemu-project/qemu/-/issues/588 [1] https://gitlab.com/qemu-project/qemu/-/issues/588 Signed-off-by: Matheus Ferst <[email protected]>
Signed-off-by: Víctor Colombo <[email protected]>
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TODO: test if the instruction is a nop in older versions