HWA/FT/02-RTL: Update to 23.2

Getting_Started/Vitis/Part2.md

@@ -17,7 +17,7 @@ To develop and deploy applications with Vitis, you need to install the Vitis uni
 
 ### Step 1: Review the Installation Requirements
 
-Prior to starting the installation process, make sure to check the [Vitis installation requirements](https://docs.xilinx.com/access/sources/dita/topic?Doc_Version=2023.2%20English&url=ug1393-vitis-application-acceleration&resourceid=igz1531201833632).
+Prior to starting the installation process, make sure to check the [Vitis installation requirements](https://docs.xilinx.com/access/sources/dita/topic?Doc_Version=2023.2%20English&url=ug1393-vitis-application-acceleration&resourceid=igz1531201833632.html).
 
 >**NOTE:** Windows OS support is limited to the Vitis embedded software development flow. The Vitis application acceleration flow is only supported on Linux.
 
@@ -29,9 +29,9 @@ Download the latest version of the Vitis from the [AMD download website](https:/
 
 After downloading the Vitis, XRT and platform packages, install them in the following order and according to the provided instructions:
 
-1. [Install the Vitis Software Platform](https://docs.xilinx.com/access/sources/dita/topic?Doc_Version=2023.2%20English&url=ug1393-vitis-application-acceleration&resourceid=juk1557377661419)
+1. [Install the Vitis Software Platform](https://docs.xilinx.com/access/sources/dita/topic?Doc_Version=2023.2%20English&url=ug1393-vitis-application-acceleration&resourceid=juk1557377661419.html)
 
-2. [Install the Xilinx Runtime and Platforms](https://docs.xilinx.com/access/sources/dita/topic?Doc_Version=2023.2%20English&url=ug1393-vitis-application-acceleration&resourceid=pjr1542153622642)
+2. [Install the Xilinx Runtime and Platforms](https://docs.xilinx.com/access/sources/dita/topic?Doc_Version=2023.2%20English&url=ug1393-vitis-application-acceleration&resourceid=pjr1542153622642.html)
 
 >**NOTE:** Installing XRT is not required when targeting Arm®-based embedded platforms. The Vitis compiler has its own copy of xclbinutil for hardware generation; and for software compilation, you can use the XRT from the sysroot on the Embedded Processor platform.
 
@@ -75,7 +75,7 @@ The packages required for each platform can be found on the corresponding downlo
 To configure the environment to run Vitis, run the following script, which sets up the environment to run in a specific command shell.
 
 ```bash
-source <Vitis_install_path>/Vitis/2022.2/settings64.sh
+source <Vitis_install_path>/Vitis/2023.2/settings64.sh
 ```
 
 >**NOTE:** `.csh` scripts are also provided but this tutorial assumes a bash shell is used.

Getting_Started/Vitis/Part3.md

@@ -52,7 +52,7 @@ Other than this, the functionality of the vector-add kernel is very easily recog
 
 The pragmas are used to map function parameters to distinct kernel ports. By mapping the two inputs parameters to different input ports, the kernel will be able to read both inputs in parallel. As a general rule, and without going into further details in this introductory tutorial, it is important to think about interface requirements of hardware accelerators and they will have a determining impact on maximum achievable performance.
 
-The Vitis online documentation provides comprehensive information on [C/C++ Kernels](https://docs.xilinx.com/access/sources/dita/topic?Doc_Version=2023.2%20English&url=ug1393-vitis-application-acceleration&resourceid=rjk1519742919747) as well as a complete [HLS Pragmas](https://docs.xilinx.com/access/sources/dita/topic?Doc_Version=2023.2%20English&url=ug1393-vitis-application-acceleration&resourceid=tfo1593136615570) reference guide.
+The Vitis online documentation provides comprehensive information on [C/C++ Kernels](https://docs.xilinx.com/access/sources/dita/topic?Doc_Version=2023.2%20English&url=ug1393-vitis-application-acceleration&resourceid=rjk1519742919747.html) as well as a complete [HLS Pragmas](https://docs.xilinx.com/access/sources/dita/topic?Doc_Version=2023.2%20English&url=ug1393-vitis-application-acceleration&resourceid=hls-pragmas-tfo1593136615570.html) reference guide.
 
 ### The Source Code for the Host Program
 

Getting_Started/Vitis/Part4-data_center.md

@@ -13,15 +13,15 @@
 
 ## Part 4: Build and Run the Data Center Application
 
- In this fourth part of the Introduction to Vitis tutorial, you will compile and run the vector-add example using each of three build targets supported in the Vitis flow as described below. The overall flow is described in [Introduction to Data Center Acceleration for Software Programmers](https://docs.xilinx.com/access/sources/dita/topic?Doc_Version=2023.2%20English&url=ug1393-vitis-application-acceleration&resourceid=fvi1642629875790), and includes the image flow diagram shown below. From the image you can see the standard G++ compilation process for the host application, and the use of the Vitis compiler (`v++`) for building the AMD device binary (`xclbin`). These are the steps you will be working through in this lab. 
+ In this fourth part of the Introduction to Vitis tutorial, you will compile and run the vector-add example using each of three build targets supported in the Vitis flow as described below. The overall flow is described in [Introduction to Data Center Acceleration for Software Programmers](https://docs.xilinx.com/access/sources/dita/topic?Doc_Version=2023.2%20English&url=ug1393-vitis-application-acceleration&resourceid=fvi1642629875790.html), and includes the image flow diagram shown below. From the image you can see the standard G++ compilation process for the host application, and the use of the Vitis compiler (`v++`) for building the AMD device binary (`xclbin`). These are the steps you will be working through in this lab. 
 
 ![img](./images/data_center_flow.png)
 
-* Software Emulation: The kernel code is compiled to run on the host processor. This allows iterative algorithm refinement through fast build-and-run loops. This target is useful for identifying syntax errors, performing source-level debugging of the kernel code running together with application, and verifying the behavior of the system. Refer to [Software Emulation](https://docs.xilinx.com/access/sources/dita/topic?Doc_Version=2023.2%20English&url=ug1393-vitis-application-acceleration&resourceid=xvc1504034328357) for more information.
+* Software Emulation: The kernel code is compiled to run on the host processor. This allows iterative algorithm refinement through fast build-and-run loops. This target is useful for identifying syntax errors, performing source-level debugging of the kernel code running together with application, and verifying the behavior of the system. Refer to [Software Emulation](https://docs.xilinx.com/access/sources/dita/topic?Doc_Version=2023.2%20English&url=ug1393-vitis-application-acceleration&resourceid=using-software-emulation-xvc1504034328357.html) for more information.
 
-* Hardware Emulation: The kernel code is compiled into a hardware model (RTL), which is run in a dedicated simulator. This build-and-run loop takes longer but provides a detailed, cycle-accurate view of kernel activity. This target is useful for testing the functionality of the logic that will go in the FPGA and getting initial performance estimates. Refer to [Hardware Emulation](https://docs.xilinx.com/access/sources/dita/topic?Doc_Version=2023.2%20English&url=ug1393-vitis-application-acceleration&resourceid=ldh1504034328524) for more information.
+* Hardware Emulation: The kernel code is compiled into a hardware model (RTL), which is run in a dedicated simulator. This build-and-run loop takes longer but provides a detailed, cycle-accurate view of kernel activity. This target is useful for testing the functionality of the logic that will go in the FPGA and getting initial performance estimates. Refer to [Hardware Emulation](https://docs.xilinx.com/access/sources/dita/topic?Doc_Version=2023.2%20English&url=ug1393-vitis-application-acceleration&resourceid=using-hardware-emulation-ldh1504034328524.html) for more information.
 
-* Hardware: The kernel code is compiled into a hardware model (RTL) and then implemented on the FPGA, resulting in a binary that will run on the actual FPGA. Refer to [System Hardware Target](https://docs.xilinx.com/access/sources/dita/topic?Doc_Version=2023.2%20English&url=ug1393-vitis-application-acceleration&resourceid=prg1504034328691) for more information.
+* Hardware: The kernel code is compiled into a hardware model (RTL) and then implemented on the FPGA, resulting in a binary that will run on the actual FPGA. Refer to [System Hardware Target](https://docs.xilinx.com/access/sources/dita/topic?Doc_Version=2023.2%20English&url=ug1393-vitis-application-acceleration&resourceid=building-for-target-fpga-platform-prg1504034328691.html) for more information.
 
 ## Building and Running on Alveo U250 Data-Center Accelerator Card
 
@@ -65,10 +65,10 @@ v++ -l -t sw_emu --platform xilinx_u250_gen3x16_xdma_4_1_202210_1 --config ../sr
 
 Here is a brief explanation of each of these four commands:
 
-1. `g++` compiles the host application using the standard GNU C compiler. Refer to [Building the Software Application](https://docs.xilinx.com/access/sources/dita/topic?Doc_Version=2023.2%20English&url=ug1393-vitis-application-acceleration&resourceid=asy1528754332783) for more information.
-2. `emconfigutil` generates an emulation configuration file which defines the device type and quantity of devices to emulate for the specified platform. Refer to [emconfigutil](https://docs.xilinx.com/access/sources/dita/topic?Doc_Version=2023.2%20English&url=ug1393-vitis-application-acceleration&resourceid=nrj1570599837825) for more information.
-3. `v++ -c -k vadd` compiles the source code for the vector-add accelerator into a compiled kernel object (.xo file) for use in software emulation (sw_emu). Refer to [Compiling C/C++ PL Kernels for Software Emulation](https://docs.xilinx.com/access/sources/dita/topic?Doc_Version=2023.2%20English&url=ug1393-vitis-application-acceleration&resourceid=kqb1693589259529) for more information.
-4. `v++ -l` links the compiled kernel with the target platform and generates the FPGA binary (.xclbin file). Refer to [Linking the System](https://docs.xilinx.com/access/sources/dita/topic?Doc_Version=2023.2%20English&url=ug1393-vitis-application-acceleration&resourceid=mjs1528399150499) for more information.
+1. `g++` compiles the host application using the standard GNU C compiler. Refer to [Building the Software Application](https://docs.xilinx.com/access/sources/dita/topic?Doc_Version=2023.2%20English&url=ug1393-vitis-application-acceleration&resourceid=asy1528754332783.html) for more information.
+2. `emconfigutil` generates an emulation configuration file which defines the device type and quantity of devices to emulate for the specified platform. Refer to [emconfigutil](https://docs.xilinx.com/access/sources/dita/topic?Doc_Version=2023.2%20English&url=ug1393-vitis-application-acceleration&resourceid=nrj1570599837825.html) for more information.
+3. `v++ -c -k vadd` compiles the source code for the vector-add accelerator into a compiled kernel object (.xo file) for use in software emulation (sw_emu). Refer to [Compiling C/C++ PL Kernels for Software Emulation](https://docs.xilinx.com/access/sources/dita/topic?Doc_Version=2023.2%20English&url=ug1393-vitis-application-acceleration&resourceid=kqb1693589259529.html) for more information.
+4. `v++ -l` links the compiled kernel with the target platform and generates the FPGA binary (.xclbin file). Refer to [Linking the System](https://docs.xilinx.com/access/sources/dita/topic?Doc_Version=2023.2%20English&url=ug1393-vitis-application-acceleration&resourceid=mjs1528399150499.html) for more information.
 
 The `-t` option of the `v++` command specifies the build target. Here it is set to `sw_emu`, so you are building for software emulation.