PFM ZCU104: upgrade to 2022.1

- Move zcu104 vitis platform creation tutorials to Design_Tutorial section
- Use PetaLinux common images instead of building PetaLinux from scratch because it can satisfy most use cases and simplify the workflow. 
- Add createdts steps to generate device tree for common image workflow

Vitis_Platform_Creation/Introduction/02-Edge-AI-ZCU104/README.md → Vitis_Platform_Creation/Design_Tutorials/02-Edge-AI-ZCU104/README.md

@@ -24,15 +24,17 @@
 
 # Vitis Custom Embedded Platform Creation Example on ZCU104
 
-***Version: Vitis 2021.2 + Vitis AI 1.4***
+***Version: Vitis 2022.1 + Vitis AI 2.0***
 
-In this module, we will create a custom Vitis embedded platform for ZCU104. It will be capable to run ***Vitis acceleration applications*** including ***Vitis-AI applications***. Of course, general ***embedded software application*** can also run on this platform.
+In this module, we will create a custom Vitis embedded platform for ZCU104. It will be capable to run ***Vitis acceleration applications*** including ***Vitis-AI applications***. Of course, general ***embedded software application*** can also run on this platform. This example system total structure is like below for your reference.
+
+  ![missing image](./images/structure.svg)
 
-> Note: Vitis-AI 1.4 still works with Vitis 2021.2. The validation application for this custom platform may be updated after Vitis-AI for Vitis 2021.2 released.
+> Note: Vitis-AI 2.0 still works with Vitis 2022.1. The validation application for this custom platform may be updated after Vitis-AI for Vitis 2022.1 released.
 
 Since ZCU104 is a validated Xilinx Evaluation Board and Vivado includes its processing system presets, we will skip step 0 mentioned in previous overview module and start to build the full hardware and generate XSA.
 
-To prepare the software components, we will import XSA into PetaLinux project and do some configurations. After building software and hardware components, we'll package the platform. At last, we'll run several test applications including Vitis-AI application on this platform to test this customized platform.
+To prepare the software components, we will utilize the common image and create our own DTB file according to our hardware exported from last step. Then we'll package the platform. At last, we'll run several test applications including Vitis-AI application on this platform to test this customized platform.
 
 
 
@@ -50,21 +52,24 @@ Vitis-AI application would integrate DPU as RTL kernel. It would require two clo
 On the software side, the platform needs to provide the XRT, ZOCL packages. Host application can use XRT OpenCL API to control Kernel. Vitis-AI software framework can control DPU with XRT. ZOCL is the kernel module that talks to acceleration kernels. It needs a device tree node so it will be added. Other Vitis-AI dependencies will also be added. Common image provided by Xilinx can accomplish all these features. Besides these common features, we wish to add GCC compilers to do application native compilation, add mesa-mega driver for Vitis-AI demo applications and replace the dropbear with openssh so that the network speed can be faster.
 
 
-
 ## Step-by-Step Tutorial
 
 We'll introduce the platform creation steps in the following pages. Each page describes one major step in the platform creation process.
 
-- [Step 1: Create the Vivado Hardware Design and Generate XSA](./step1.md)
-- [Step 2: Create the Software Components with PetaLinux](./step2.md)
-- [Step 3: Create the Vitis Platform](./step3.md)
-- [Step 4: Test the Platform](./step4.md)
+- [Step 1: Create the Hardware Platform](./step1.md)</br>
+            Utilize Vivado to generate XSA file  which contains hardware information of our platform
+- [Step 2: Create the Vitis Software Platform](./step2.md)</br>
+            Prepare software components and create Vitis platform
+- [Step 3: Create Vitis Application](./step3.md)</br>
+            Create simple application to validate our Vitis Platform
 
-***Let's start from [step 1: Vivado Design](./step1.md).***
+***Let's start from [step 1: Create the Hradware Platform](./step1.md).***
 
 
 ## Change Log
-
+### 2022.1
+- From this version we begin to use common image instead of the Petalinux building process. If you want to leverage the Petalinux tool to customize your system you can refer [PetaLinux customization page](./petaLinux_customization.md).
+- For device tree file we suggest to use `createdts` command to generate it.
 ### 2021.2
 - The Vivado project exports XSA for hardware and hardware emulation seperatedly. When creating the platform in [step3](./step3.md), it's recommended to provide seperate XSA for hardware and hardware emulation.
 

Vitis_Platform_Creation/Introduction/02-Edge-AI-ZCU104/ref_files/Makefile → Vitis_Platform_Creation/Design_Tutorials/02-Edge-AI-ZCU104/ref_files/Makefile

@@ -12,37 +12,31 @@
 # See the License for the specific language governing permissions and
 # limitations under the License.
 
-.PHONY: all clean step1 step2 step3 step4
-all: step1 step2 step3 step4
+.PHONY: all clean step1 step2 step3 petalinux_customization
+all: step1 step2 step3 petalinux_customization
 
 XSA=step1_vivado/build/vivado/zcu104_custom_platform_hw.xsa
-IMG=step2_petalinux/build/petalinux/images/image.ub
-XPFM=step3_pfm/platform_repo/zcu104_custom_platform/export/zcu104_custom_platform/zcu104_custom_platform.xpfm
+IMG=step2_pfm/xilinx-zynqmp-common-v2022.1/Image
+XPFM=step2_pfm/zcu104_custom/export/zcu104_custom/zcu104_custom.xpfm
 
 # Step 1: Generate XSA with Vivado
 step1: $(XSA)
 
 $(XSA):
 	$(MAKE) -C step1_vivado all
 
-# Step 2: Use PetaLinux to generate Software Components
-step2: $(IMG)
 
-$(IMG): $(XSA) 
-	$(MAKE) -C step2_petalinux all
+# Step 2: Generate Platform
+step2: $(XPFM)
 
-# Step 3: Generate Platform
-step3: $(XPFM)
-
-$(XPFM): $(XSA) $(IMG)
-	$(MAKE) -C step3_pfm all
+$(XPFM): $(XSA) 
+	$(MAKE) -C step2_pfm all
 
-# Step 4: Validate Design
-step4: $(XPFM)
-	$(MAKE) -C step4_validate all
+# Step 3: Validate Design
+step3: $(XPFM)
+	$(MAKE) -C step3_validate all
 
 clean:
 	$(MAKE) -C step1_vivado clean
-	$(MAKE) -C step2_petalinux clean
-	$(MAKE) -C step3_pfm clean
-	$(MAKE) -C step4_validate clean
+	$(MAKE) -C step2_pfm clean
+	$(MAKE) -C step3_validate clean

Vitis_Platform_Creation/Introduction/02-Edge-AI-ZCU104/ref_files/description.json → Vitis_Platform_Creation/Design_Tutorials/02-Edge-AI-ZCU104/ref_files/description.json

@@ -21,11 +21,6 @@
         "custom_build_target":
         {
             "all": "all"
-        },
-        "tasks": {
-            "build": {
-                "pre_exec": "/proj/petalinux/2021.2/petalinux-v2021.2_1014_1/tool/petalinux-v2021.2-final/settings.sh"
-            }
         }
     },
     "OS_JSON":"/proj/dsv/xbot/Jenkins/configuration/vitis_tutorial_edge_os.json"

Vitis_Platform_Creation/Introduction/02-Edge-AI-ZCU104/ref_files/step2_petalinux/Makefile → Vitis_Platform_Creation/Design_Tutorials/02-Edge-AI-ZCU104/ref_files/petalinux_customization/Makefile

@@ -1,4 +1,4 @@
-# Copyright 2020 Xilinx Inc.
+# Copyright 2022 Xilinx Inc.
 #
 # Licensed under the Apache License, Version 2.0 (the "License");
 # you may not use this file except in compliance with the License.

Vitis_Platform_Creation/Introduction/02-Edge-AI-ZCU104/ref_files/step2_petalinux/system-user.dtsi → Vitis_Platform_Creation/Design_Tutorials/02-Edge-AI-ZCU104/ref_files/petalinux_customization/system-user.dtsi

@@ -1,6 +1,6 @@
 /*
 *
-* Copyright 2020 Xilinx Inc.
+* Copyright 2022 Xilinx Inc.
 *
 * Licensed under the Apache License, Version 2.0 (the "License");
 * you may not use this file except in compliance with the License.

Vitis_Platform_Creation/Introduction/02-Edge-AI-ZCU104/ref_files/step1_vivado/Makefile → Vitis_Platform_Creation/Design_Tutorials/02-Edge-AI-ZCU104/ref_files/step1_vivado/Makefile

@@ -1,4 +1,4 @@
-# Copyright 2020 Xilinx Inc.
+# Copyright 2022 Xilinx Inc.
 #
 # Licensed under the Apache License, Version 2.0 (the "License");
 # you may not use this file except in compliance with the License.

Vitis_Platform_Creation/Introduction/02-Edge-AI-ZCU104/ref_files/step1_vivado/export_xsa.tcl → Vitis_Platform_Creation/Design_Tutorials/02-Edge-AI-ZCU104/ref_files/step1_vivado/export_xsa.tcl

@@ -1,4 +1,4 @@
-# Copyright 2020 Xilinx Inc.
+# Copyright 2022 Xilinx Inc.
 #
 # Licensed under the Apache License, Version 2.0 (the "License");
 # you may not use this file except in compliance with the License.

Vitis_Platform_Creation/Introduction/02-Edge-AI-ZCU104/ref_files/step1_vivado/system_step1.tcl → Vitis_Platform_Creation/Design_Tutorials/02-Edge-AI-ZCU104/ref_files/step1_vivado/system_step1.tcl

@@ -32,7 +32,7 @@ set script_folder [_tcl::get_script_folder]
 ################################################################
 # Check if script is running in correct Vivado version.
 ################################################################
-set scripts_vivado_version 2021.2
+set scripts_vivado_version 2022.1
 set current_vivado_version [version -short]
 
 if { [string first $scripts_vivado_version $current_vivado_version] == -1 } {
@@ -139,7 +139,7 @@ if { $bCheckIPs == 1 } {
 xilinx.com:ip:axi_intc:4.1\
 xilinx.com:ip:clk_wiz:6.0\
 xilinx.com:ip:proc_sys_reset:5.0\
-xilinx.com:ip:zynq_ultra_ps_e:3.3\
+xilinx.com:ip:zynq_ultra_ps_e:3.4\
 "
 
    set list_ips_missing ""
@@ -263,7 +263,7 @@ proc create_root_design { parentCell } {
   set rst_ps8_0_100M [ create_bd_cell -type ip -vlnv xilinx.com:ip:proc_sys_reset:5.0 rst_ps8_0_100M ]
 
   # Create instance: zynq_ultra_ps_e_0, and set properties
-  set zynq_ultra_ps_e_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:zynq_ultra_ps_e:3.3 zynq_ultra_ps_e_0 ]
+  set zynq_ultra_ps_e_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:zynq_ultra_ps_e:3.4 zynq_ultra_ps_e_0 ]
   set_property -dict [ list \
    CONFIG.CAN0_BOARD_INTERFACE {custom} \
    CONFIG.CAN1_BOARD_INTERFACE {custom} \

Vitis_Platform_Creation/Design_Tutorials/02-Edge-AI-ZCU104/ref_files/step2_pfm/Makefile

@@ -0,0 +1,65 @@
+#Copyright 2022 Xilinx Inc.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#     http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+.PHONY: prep_common sw_comp pfm prep_sw_comp prep_sysroot all
+
+XSA_NAME=zcu104_custom_platform
+PLATFORM_NAME=zcu104_custom
+PLATFORM_NAME_FSBL=zcu104_custom_fsbl
+COMMON_IMAGE=xilinx-zynqmp-common-v2022.1/Image
+#COMMON_IMAGE_NAME=xilinx-zynqmp-common-v2022.1
+all: prep_common sw_comp dtb pfm_fsbl pfm  prep_sw_comp  prep_sysroot 
+main: prep_common sw_comp pfm_partial prep_sw_comp pfm dtb
+
+prep_common:
+	@echo "Extract the common Image.(if no common image ,please download it)"
+	tar xvf xilinx-zynqmp-common-v2022.1.tar.gz -C .
+
+
+sw_comp: $(COMMON_IMAGE)
+	@echo "INFO: Copying software components from common image DIR  to local directory ./boot and ./sd_dir"
+	mkdir -p ./sd_dir && mkdir -p ./boot && \
+	cp xilinx-zynqmp-common-v2022.1/bl31.elf boot/
+	cp xilinx-zynqmp-common-v2022.1/u-boot.elf boot/
+	cp xilinx-zynqmp-common-v2022.1/boot.scr sd_dir/
+
+dtb:
+	@echo "execute createdts to generate dtb file"
+	-xsct -eval " createdts -hw ../step1_vivado/build/vivado/$(XSA_NAME)_hw.xsa -zocl  -platform-name mydevice -out .  -git-branch xlnx_rel_v2021.2 -board  zcu104-revc -compile "
+	cp mydevice/psu_cortexa53_0/device_tree_domain/bsp/system.dtb boot/
+	cp mydevice/psu_cortexa53_0/device_tree_domain/bsp/system.dtb sd_dir/
+
+pfm_fsbl:
+	@echo "INFO: Creating simple Platform $(PLATFORM_NAME_FSBL) to get FSBL and PMU"
+#FSBL option is to convince XSCT to create a simple platform to get FSBL and PMU.
+	xsct xsct_create_pfm.tcl  $(PLATFORM_NAME_FSBL)  $(XSA_NAME)  ../step1_vivado/build/vivado fsbl
+	@echo "INFO: Checking created platforms:" && find . -name "*.xpfm"
+
+pfm:
+	cp $(PLATFORM_NAME_FSBL)/zynqmp_fsbl/fsbl_a53.elf boot/fsbl.elf
+	cp $(PLATFORM_NAME_FSBL)/zynqmp_pmufw/pmufw.elf boot/
+	@echo "INFO: Creating Final Platform $(PLATFORM_NAME)"
+	xsct xsct_create_pfm.tcl $(PLATFORM_NAME) $(XSA_NAME) ../step1_vivado/build/vivado
+	@echo "INFO: Checking created platforms:" && find . -name "*.xpfm"
+prep_sw_comp:
+	mkdir -p sw_comp && \
+	cp xilinx-zynqmp-common-v2022.1/rootfs.ext4 ./sw_comp && \
+	cp xilinx-zynqmp-common-v2022.1/Image ./sw_comp
+
+prep_sysroot: 
+	rm -rf ./sysroot && mkdir sysroot && sh xilinx-zynqmp-common-v2022.1/sdk.sh -d sysroot -y
+clean:
+	$(RM) -r vitis_* xrc.log build  sd_dir boot xilinx-zynqmp-common-v2022.1 sysroot
+ultraclean: clean
+	$(RM) -r sw_comp $(PLATFORM_NAME) $(PLATFORM_NAME_FSBL) device-tree-xlnx xilinx-zynqmp-common-v2022.1.tar.gz mydevice

Vitis_Platform_Creation/Design_Tutorials/02-Edge-AI-ZCU104/ref_files/step2_pfm/xsct_create_pfm.tcl

@@ -0,0 +1,64 @@
+# Copyright 2022 Xilinx Inc.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#     http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+
+set platform_name [lindex $argv 0]
+puts "The platform name is \"$platform_name\"" 
+set xsa_name [lindex $argv 1]
+puts "The xsa name is \"$xsa_name\"" 
+set xsa_path [lindex $argv 2]
+puts "The xsa path is \"$xsa_path\"" 
+#set OUTPUT platform_repo
+#we use setws  command to specify the current directory as output directory. If you do not use ,you can set -out option.
+setws .
+
+if { [string equal -nocase fsbl [lindex $argv 3]] } {
+
+    puts "create a simple Platform to get FSBL  and PMU"
+    platform create -name $platform_name \
+    -desc "A custom platform ZCU104 platform" \
+    -hw ${xsa_path}/${xsa_name}_hw.xsa \
+    -hw_emu ${xsa_path}/${xsa_name}_hwemu.xsa \
+    -fsbl-target psu_cortexa53_0
+#-out ./${OUTPUT}  
+
+#   Standalone Domain
+    domain create -name standalone -proc psu_cortexa53_0 -os standalone -arch {64-bit} 
+    platform write
+    platform generate
+} else {
+
+    puts "create final Vitis platform"
+    platform create -name $platform_name \
+        -desc "A custom platform ZCU104 platform" \
+        -hw ${xsa_path}/${xsa_name}_hw.xsa \
+        -hw_emu ${xsa_path}/${xsa_name}_hwemu.xsa \
+        -no-boot-bsp    
+#-out ./${OUTPUT}  
+
+# Linux domain
+    domain create -name xrt -proc psu_cortexa53 -os linux -arch {64-bit} -runtime {ocl} -sd-dir {./sd_dir}  -bootmode {sd}
+    domain config -boot {./boot}
+    domain config -generate-bif
+    domain config -qemu-data ./boot
+    platform write
+    platform generate
+
+}
+
+    exit
+
+
+
+

Vitis_Platform_Creation/Introduction/02-Edge-AI-ZCU104/ref_files/step4_validate/Makefile → Vitis_Platform_Creation/Design_Tutorials/02-Edge-AI-ZCU104/ref_files/step3_validate/Makefile

@@ -1,4 +1,4 @@
-# Copyright 2020 Xilinx Inc.
+# Copyright 2022 Xilinx Inc.
 #
 # Licensed under the Apache License, Version 2.0 (the "License");
 # you may not use this file except in compliance with the License.
@@ -13,10 +13,10 @@
 # limitations under the License.
 
 ROOT_DIR=$(realpath $(dir $(lastword $(MAKEFILE_LIST))))
-XSA_NAME=zcu104_custom_platform
-PLATFORM = $(ROOT_DIR)/../step3_pfm/platform_repo/$(XSA_NAME)/export/$(XSA_NAME)/$(XSA_NAME).xpfm
-SW_COMP = $(ROOT_DIR)/../step3_pfm/sw_comp/
-
+PLATFORM_NAME=zcu104_custom
+PLATFORM = $(ROOT_DIR)/../step2_pfm/$(PLATFORM_NAME)/export/$(PLATFORM_NAME)/$(PLATFORM_NAME).xpfm
+SW_COMP = $(ROOT_DIR)/../step2_pfm/sw_comp/
+SYSROOT=$(ROOT_DIR)/../step2_pfm/sysroot/
 PL_EXAMPLE_PATH = Vitis_Accel_Examples/cpp_kernels/simple_vadd/
 
 VAI_DPU_TRD_PATH = Vitis-AI/dsa/DPU-TRD/prj/Vitis/
@@ -29,13 +29,13 @@ Vitis_Accel_Examples:
 	git clone https://github.com/Xilinx/Vitis_Accel_Examples.git -b 2021.2
 
 $(PL_EXAMPLE_PATH)/krnl_vadd.xclbin: Vitis_Accel_Examples $(PLATFORM)
-	$(MAKE) -C $(PL_EXAMPLE_PATH) all TARGET=hw_emu DEVICE=$(PLATFORM) HOST_ARCH=aarch64 EDGE_COMMON_SW=$(SW_COMP) SYSROOT=$(SW_COMP)/sysroots/cortexa72-cortexa53-xilinx-linux
+	$(MAKE) -C $(PL_EXAMPLE_PATH) all TARGET=hw_emu DEVICE=$(PLATFORM) HOST_ARCH=aarch64 EDGE_COMMON_SW=$(SW_COMP) SYSROOT=$(SYSROOT)sysroots/cortexa72-cortexa53-xilinx-linux
 
 vadd: $(PL_EXAMPLE_PATH)/krnl_vadd.xclbin $(PLATFORM)
-	$(MAKE) -C $(PL_EXAMPLE_PATH) test TARGET=hw_emu DEVICE=$(PLATFORM) HOST_ARCH=aarch64 EDGE_COMMON_SW=$(SW_COMP) SYSROOT=$(SW_COMP)/sysroots/cortexa72-cortexa53-xilinx-linux
+	$(MAKE) -C $(PL_EXAMPLE_PATH) test TARGET=hw_emu DEVICE=$(PLATFORM) HOST_ARCH=aarch64 EDGE_COMMON_SW=$(SW_COMP) SYSROOT=$(SYSROOT)/sysroots/cortexa72-cortexa53-xilinx-linux
 
 vadd_hw: 
-	$(MAKE) -C $(PL_EXAMPLE_PATH) all TARGET=hw DEVICE=$(PLATFORM) HOST_ARCH=aarch64 EDGE_COMMON_SW=$(SW_COMP) SYSROOT=$(SW_COMP)/sysroots/cortexa72-cortexa53-xilinx-linux
+	$(MAKE) -C $(PL_EXAMPLE_PATH) all TARGET=hw DEVICE=$(PLATFORM) HOST_ARCH=aarch64 EDGE_COMMON_SW=$(SW_COMP) SYSROOT=$(SYSROOT)/sysroots/cortexa72-cortexa53-xilinx-linux
 
 Vitis-AI:
 	git clone https://github.com/Xilinx/Vitis-AI.git -b 1.4
@@ -52,7 +52,8 @@ platforminfo:
 clean:
 	$(MAKE) -C $(PL_EXAMPLE_PATH) clean
 	$(MAKE) -C $(VAI_DPU_TRD_PATH) clean
+	$(MAKE) -C platforminfo  clean
 	cd $(VAI_DPU_TRD_PATH); git reset --hard
 
 ultraclean:
-	rm -rf Vitis_Accel_Examples Vitis-AI
+	rm -rf Vitis_Accel_Examples Vitis-AI

Vitis_Platform_Creation/Introduction/02-Edge-AI-ZCU104/ref_files/step4_validate/platforminfo/Makefile → Vitis_Platform_Creation/Design_Tutorials/02-Edge-AI-ZCU104/ref_files/step3_validate/platforminfo/Makefile

@@ -12,13 +12,13 @@
 # See the License for the specific language governing permissions and
 # limitations under the License.
 
-XSA_NAME=zcu104_custom_platform
-PLATFOMR_PATH = ../../step3_pfm/platform_repo/$(XSA_NAME)/export/$(XSA_NAME)/$(XSA_NAME).xpfm
+PLATFORM_NAME=zcu104_custom
+PLATFOMR_PATH = ../../step2_pfm/$(PLATFORM_NAME)/export/$(PLATFORM_NAME)/$(PLATFORM_NAME).xpfm
 
 .PHONY: all clean
 
 all:
 	platforminfo $(PLATFOMR_PATH) > platforminfo.txt
 
 clean:
-	rm platforminfo.txt
+	rm platforminfo.txt