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[AIE2P] Expand all spill pseudos from eliminateFrameIndex
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@niwinanto
niwinanto committed Jan 27, 2025
1 parent eb33c58 commit b3b45cd
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Showing 6 changed files with 208 additions and 381 deletions.
22 changes: 2 additions & 20 deletions llvm/lib/Target/AIE/aie2p/AIE2PInstrInfo.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -1105,11 +1105,11 @@ unsigned AIE2PInstrInfo::getCycleSeparatorOpcode() const {
return AIE2P::CYCLE_SEPARATOR;
}

// Note: Some pseudos like spill/reload are already expanded in
// eliminateFrameIndex.
bool AIE2PInstrInfo::expandPostRAPseudo(MachineInstr &MI) const {
auto DL = MI.getDebugLoc();
MachineBasicBlock &MBB = *MI.getParent();
MachineRegisterInfo &MRI = MBB.getParent()->getRegInfo();
const TargetRegisterInfo &TRI = *MRI.getTargetRegisterInfo();
switch (MI.getOpcode()) {
case AIE2P::PseudoMove: {
Register Dst = MI.getOperand(0).getReg();
Expand All @@ -1119,24 +1119,6 @@ bool AIE2PInstrInfo::expandPostRAPseudo(MachineInstr &MI) const {
MI.eraseFromParent();
return true;
}
case AIE2P::VST_DM_SPILL:
case AIE2P::ST_D_SPILL:
case AIE2P::ST_DS_SPILL:
case AIE2P::VST_CM_SPILL:
case AIE2P::VST_FIFO_SPILL:
case AIE2P::VST_PLFR_SPILL:
case AIE2P::VST_L_SPILL:
case AIE2P::VST_Y_SPILL:
case AIE2P::VLDA_DM_SPILL:
case AIE2P::LDA_D_SPILL:
case AIE2P::LDA_DS_SPILL:
case AIE2P::VLDA_CM_SPILL:
case AIE2P::VLDA_FIFO_SPILL:
case AIE2P::VLDA_PLFR_SPILL:
case AIE2P::VLDA_L_SPILL:
case AIE2P::VLDA_Y_SPILL:
expandSpillPseudo(MI, TRI, /*SubRegOffsetAlign=*/Align(4));
return true;
}
return false;
}
Expand Down
32 changes: 18 additions & 14 deletions llvm/lib/Target/AIE/aie2p/AIE2PRegisterInfo.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -194,6 +194,20 @@ bool AIE2PRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
}
return false;
}
case AIE2P::LDA_dmv_lda_q_spill:
case AIE2P::VLDA_128_dmv_lda_w_spill:
case AIE2P::VLDA_dmw_lda_w_spill:
case AIE2P::VLDA_dmx_lda_bm_spill:
case AIE2P::VLDA_dmx_lda_fifohl_spill:
case AIE2P::VLDA_dmx_lda_x_spill:
case AIE2P::ST_dmv_sts_q_spill:
case AIE2P::VST_128_dmv_sts_w_spill:
case AIE2P::VST_dmw_sts_w_spill:
case AIE2P::VST_dmx_sts_bm_spill:
case AIE2P::VST_dmx_sts_fifohl_spill:
case AIE2P::VST_dmx_sts_x_spill:
MI.getOperand(FIOperandNum).ChangeToImmediate(Offset);
return false;
case AIE2P::VLDA_L_SPILL:
case AIE2P::VST_L_SPILL:
case AIE2P::LDA_D_SPILL:
Expand All @@ -204,6 +218,7 @@ bool AIE2PRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
// sub-register spills should also be fine.
if (isEncodableAsNegativeInt<9, 4>(Offset)) {
MI.getOperand(FIOperandNum).ChangeToImmediate(Offset);
TII->expandSpillPseudo(MI, TRI, /*SubRegOffsetAlign=*/Align(4));
} else {
Register SPReg =
MF.getRegInfo().createVirtualRegister(&AIE2P::ePRegClass);
Expand All @@ -212,20 +227,8 @@ bool AIE2PRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
TII->expandSpillPseudo(MI, TRI, /*SubRegOffsetAlign=*/Align(4), SPReg,
Offset);
}
return false;
return true;
}
case AIE2P::LDA_dmv_lda_q_spill:
case AIE2P::VLDA_128_dmv_lda_w_spill:
case AIE2P::VLDA_dmw_lda_w_spill:
case AIE2P::VLDA_dmx_lda_bm_spill:
case AIE2P::VLDA_dmx_lda_fifohl_spill:
case AIE2P::VLDA_dmx_lda_x_spill:
case AIE2P::ST_dmv_sts_q_spill:
case AIE2P::VST_128_dmv_sts_w_spill:
case AIE2P::VST_dmw_sts_w_spill:
case AIE2P::VST_dmx_sts_bm_spill:
case AIE2P::VST_dmx_sts_fifohl_spill:
case AIE2P::VST_dmx_sts_x_spill:
case AIE2P::VST_DM_SPILL:
case AIE2P::VST_CM_SPILL:
case AIE2P::VST_FIFO_SPILL:
Expand All @@ -237,7 +240,8 @@ bool AIE2PRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
case AIE2P::VLDA_PLFR_SPILL:
case AIE2P::VLDA_Y_SPILL:
MI.getOperand(FIOperandNum).ChangeToImmediate(Offset);
return false;
TII->expandSpillPseudo(MI, TRI, /*SubRegOffsetAlign=*/Align(4));
return true;
case AIE2P::PseudoFI: {
// DstReg = FI;
// Replace with DstReg = FrameReg, DstReg += Offset;
Expand Down
88 changes: 80 additions & 8 deletions llvm/test/CodeGen/AIE/aie2p/eliminate-frame-index.mir
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Original file line number Diff line number Diff line change
Expand Up @@ -90,6 +90,66 @@ body: |
VST_dmx_sts_bm_spill $bmll1, %stack.1, implicit $sp
...

---
name: test_vec1024
alignment: 16
stack:
- { id: 0, name: '', type: spill-slot, offset: 0, size: 128, alignment: 32 }
body: |
bb.0 (align 16):
; CHECK-LABEL: name: test_vec1024
; CHECK: frame-setup PADDXM_pstm_sp_imm 128, implicit-def $sp, implicit $sp
; CHECK-NEXT: VST_dmx_sts_x_spill $x6, -128, implicit $sp :: (store (s512) into %stack.0)
; CHECK-NEXT: VST_dmx_sts_x_spill $x7, -64, implicit $sp :: (store (s512) into %stack.0 + 64)
; CHECK-NEXT: $x6 = VLDA_dmx_lda_x_spill -128, implicit $sp :: (load (s512) from %stack.0)
; CHECK-NEXT: $x7 = VLDA_dmx_lda_x_spill -64, implicit $sp :: (load (s512) from %stack.0 + 64)
VST_Y_SPILL $y3, %stack.0, implicit $sp :: (store (s1024) into %stack.0, align 64)
$y3 = VLDA_Y_SPILL %stack.0, implicit $sp :: (load (s1024) from %stack.0, align 64)
...

---
name: test_acc1024
alignment: 16
stack:
- { id: 0, name: '', type: spill-slot, offset: 0, size: 128, alignment: 32 }
body: |
bb.0 (align 16):
; CHECK-LABEL: name: test_acc1024
; CHECK: frame-setup PADDXM_pstm_sp_imm 128, implicit-def $sp, implicit $sp
; CHECK-NEXT: VST_dmx_sts_bm_spill $bmll3, -128, implicit $sp :: (store (s512) into %stack.0)
; CHECK-NEXT: VST_dmx_sts_bm_spill $bmlh3, -64, implicit $sp :: (store (s512) into %stack.0 + 64)
; CHECK-NEXT: $bmll3 = VLDA_dmx_lda_bm_spill -128, implicit $sp :: (load (s512) from %stack.0)
; CHECK-NEXT: $bmlh3 = VLDA_dmx_lda_bm_spill -64, implicit $sp :: (load (s512) from %stack.0 + 64)
VST_CM_SPILL $cml3, %stack.0, implicit $sp :: (store (s1024) into %stack.0, align 64)
$cml3 = VLDA_CM_SPILL %stack.0, implicit $sp :: (load (s1024) from %stack.0, align 64)
...


---
name: test_acc2048
alignment: 16
stack:
- { id: 0, name: '', type: spill-slot, offset: 0, size: 128, alignment: 32 }
body: |
bb.0 (align 16):
; CHECK-LABEL: name: test_acc2048
; CHECK: frame-setup PADDXM_pstm_sp_imm 128, implicit-def $sp, implicit $sp
; CHECK-NEXT: VST_dmx_sts_bm_spill $bmll3, -128, implicit $sp :: (store (s512) into %stack.0)
; CHECK-NEXT: VST_dmx_sts_bm_spill $bmlh3, -64, implicit $sp :: (store (s512) into %stack.0 + 64)
; CHECK-NEXT: VST_dmx_sts_bm_spill $bmhl3, 0, implicit $sp :: (store (s512) into %stack.0 + 128)
; CHECK-NEXT: VST_dmx_sts_bm_spill $bmhh3, 64, implicit $sp :: (store (s512) into %stack.0 + 192)
; CHECK-NEXT: $bmll3 = VLDA_dmx_lda_bm_spill -128, implicit $sp :: (load (s512) from %stack.0)
; CHECK-NEXT: $bmlh3 = VLDA_dmx_lda_bm_spill -64, implicit $sp :: (load (s512) from %stack.0 + 64)
; CHECK-NEXT: $bmhl3 = VLDA_dmx_lda_bm_spill 0, implicit $sp :: (load (s512) from %stack.0 + 128)
; CHECK-NEXT: $bmhh3 = VLDA_dmx_lda_bm_spill 64, implicit $sp :: (load (s512) from %stack.0 + 192)
VST_DM_SPILL $dm3, %stack.0, implicit $sp :: (store (s1024) into %stack.0, align 64)
$dm3 = VLDA_DM_SPILL %stack.0, implicit $sp :: (load (s2048) from %stack.0, align 64)
...


---
name: test_vec128
alignment: 16
Expand Down Expand Up @@ -121,8 +181,10 @@ body: |
; CHECK-NEXT: frame-setup PADDXM_pstm_sp_imm 64, implicit-def $sp, implicit $sp
; CHECK-NEXT: $r0 = PseudoMove killed $r14
; CHECK-NEXT: $r1 = PseudoMove killed $r15
; CHECK-NEXT: $l7 = VLDA_L_SPILL -56, implicit $sp
; CHECK-NEXT: VST_L_SPILL $l7, -56, implicit $sp
; CHECK-NEXT: $r14 = LDA_dms_lda_spill -56, implicit $sp
; CHECK-NEXT: $r15 = LDA_dms_lda_spill -52, implicit $sp
; CHECK-NEXT: ST_dms_sts_spill $r14, -56, implicit $sp
; CHECK-NEXT: ST_dms_sts_spill $r15, -52, implicit $sp
$l7 = VLDA_L_SPILL %stack.1, implicit $sp
VST_L_SPILL $l7, %stack.1, implicit $sp
...
Expand All @@ -138,8 +200,10 @@ body: |
; CHECK-LABEL: name: test_fifo_lf
; CHECK: frame-setup PADDXM_pstm_sp_imm 128, implicit-def $sp, implicit $sp
; CHECK-NEXT: $lf0 = VLDA_FIFO_SPILL -128, implicit $sp
; CHECK-NEXT: VST_FIFO_SPILL $lf0, -128, implicit $sp
; CHECK-NEXT: $lfl0 = VLDA_dmx_lda_fifohl_spill -128, implicit $sp
; CHECK-NEXT: $lfh0 = VLDA_dmx_lda_fifohl_spill -64, implicit $sp
; CHECK-NEXT: VST_dmx_sts_fifohl_spill $lfl0, -128, implicit $sp
; CHECK-NEXT: VST_dmx_sts_fifohl_spill $lfh0, -64, implicit $sp
$lf0 = VLDA_FIFO_SPILL %stack.0, implicit $sp
VST_FIFO_SPILL $lf0, %stack.0, implicit $sp
...
Expand All @@ -154,8 +218,10 @@ body: |
; CHECK-LABEL: name: test_fifo_sf
; CHECK: frame-setup PADDXM_pstm_sp_imm 128, implicit-def $sp, implicit $sp
; CHECK-NEXT: $sf = VLDA_FIFO_SPILL -128, implicit $sp
; CHECK-NEXT: VST_FIFO_SPILL $sf, -128, implicit $sp
; CHECK-NEXT: $sfl = VLDA_dmx_lda_fifohl_spill -128, implicit $sp
; CHECK-NEXT: $sfh = VLDA_dmx_lda_fifohl_spill -64, implicit $sp
; CHECK-NEXT: VST_dmx_sts_fifohl_spill $sfl, -128, implicit $sp
; CHECK-NEXT: VST_dmx_sts_fifohl_spill $sfh, -64, implicit $sp
$sf = VLDA_FIFO_SPILL %stack.0, implicit $sp
VST_FIFO_SPILL $sf, %stack.0, implicit $sp
...
Expand All @@ -171,8 +237,14 @@ body: |
; CHECK-LABEL: name: test_fifo_plfr
; CHECK: frame-setup PADDXM_pstm_sp_imm 192, implicit-def $sp, implicit $sp
; CHECK-NEXT: $plfr0 = VLDA_PLFR_SPILL -192, implicit $sp
; CHECK-NEXT: VST_PLFR_SPILL $plfr0, -192, implicit $sp
; CHECK-NEXT: $lfl0 = VLDA_dmx_lda_fifohl_spill -192, implicit $sp
; CHECK-NEXT: $lfh0 = VLDA_dmx_lda_fifohl_spill -128, implicit $sp
; CHECK-NEXT: $r24 = LDA_dms_lda_spill -64, implicit $sp
; CHECK-NEXT: $p0 = LDA_dms_lda_spill -60, implicit $sp
; CHECK-NEXT: VST_dmx_sts_fifohl_spill $lfl0, -192, implicit $sp
; CHECK-NEXT: VST_dmx_sts_fifohl_spill $lfh0, -128, implicit $sp
; CHECK-NEXT: ST_dms_sts_spill $p0, -64, implicit $sp
; CHECK-NEXT: ST_dms_sts_spill $r24, -60, implicit $sp
$plfr0 = VLDA_PLFR_SPILL %stack.0, implicit $sp
VST_PLFR_SPILL $plfr0, %stack.0, implicit $sp
...
Expand Down
115 changes: 0 additions & 115 deletions llvm/test/CodeGen/AIE/aie2p/postrapseudos/vld_spill.mir
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