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[AIE2] Combiners for 8x8->8x8 and 8x4->4x8 matrix transposes #76

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[AIE2] Combiners for 8x8->8x8 and 8x4->4x8 matrix transposes #76

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2ae63a8
[AIE2] Enable G_CONCAT_VECTOR optimizations for AIE2
ValentijnvdBeek May 13, 2024
a3ae452
[GISel][CombinerHelper] Add a generator that counts from 0 to n
ValentijnvdBeek Aug 15, 2024
df516f9
[GISel][CombinerHelper] Use a stream to check for G_CONCAT_VECTOR
ValentijnvdBeek Aug 15, 2024
b8652cc
[GISel][CombinerHelper] Add a helper that unmerges a vector to a targ…
ValentijnvdBeek May 13, 2024
6cb3e09
[GISel][CombinerHelper] Add two patterns that extract the first two c…
ValentijnvdBeek May 13, 2024
40e0c76
[GISel][CombinerHelper] Add a function that chains a list of generato…
ValentijnvdBeek May 13, 2024
13cc82a
[GISel][CombinerHelper] Add a combiner to concatenate the first halfs…
ValentijnvdBeek Jun 14, 2024
6aa86b5
[AIE2] AIE2 custom shuffle vector mask support
ValentijnvdBeek May 27, 2024
302563b
[AIE2][Combiner] Add generator for alternating sequences
ValentijnvdBeek Aug 15, 2024
4cf13dd
[AIE2] Helper function for creating VSHUFFLE instructions
ValentijnvdBeek Aug 15, 2024
4c349de
[AIE2] Replace 8x8->8x8 & 8x4 ->4x8 tranpose shuffle vector with vshu…
ValentijnvdBeek Aug 15, 2024
d1d0a3a
[AIE2] Implement vshuffle instruction selection
ValentijnvdBeek Aug 15, 2024
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21 changes: 21 additions & 0 deletions llvm/lib/Target/AIE/AIE2PreLegalizerCombiner.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -211,11 +211,32 @@ CombinerHelper::GeneratorType sectionGenerator(const int32_t From,

bool AIE2PreLegalizerCombinerImpl::tryCombineShuffleVector(
MachineInstr &MI) const {
const Register DstReg = MI.getOperand(0).getReg();
const LLT DstTy = MRI.getType(DstReg);
const LLT SrcTy = MRI.getType(MI.getOperand(1).getReg());
const unsigned DstNumElts = DstTy.isVector() ? DstTy.getNumElements() : 1;
const unsigned SrcNumElts = SrcTy.isVector() ? SrcTy.getNumElements() : 1;
MachineIRBuilder MIB(MI);
MachineRegisterInfo &MRI = *MIB.getMRI();

if (Helper.tryCombineShuffleVector(MI))
return true;

const LLT V64S8 = LLT::fixed_vector(64, 8);
CombinerHelper::GeneratorType FourPartitions =
sectionGenerator(0, DstNumElts, 4, 1);
if (Helper.matchCombineShuffleVector(MI, FourPartitions, DstNumElts))
return createVShuffle(MI, V64S8, 35);

const LLT V32S16 = LLT::fixed_vector(32, 16);
CombinerHelper::GeneratorType FourPartitionByTwo =
sectionGenerator(0, DstNumElts, 4, 2);
if (Helper.matchCombineShuffleVector(MI, FourPartitionByTwo, DstNumElts))
return createVShuffle(MI, V32S16, 29);

return false;
}

bool AIE2PreLegalizerCombinerImpl::tryCombineAll(MachineInstr &MI) const {
if (tryCombineAllImpl(MI))
return true;
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