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BM1370 ASIC Driver Timing & Initialization Fixes - #1836

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mutatrum wants to merge 7 commits into
bitaxeorg:masterfrom
mutatrum:fix/bm1370-init-timing
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BM1370 ASIC Driver Timing & Initialization Fixes#1836
mutatrum wants to merge 7 commits into
bitaxeorg:masterfrom
mutatrum:fix/bm1370-init-timing

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@mutatrum

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Adds ASIC init delays and per-chip register read loops. Also refactors VLA to a fixed buffer to eliminate stack overflow risks.

Extracted from #1807.

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github-actions Bot commented Jul 29, 2026

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Test Results

  2 files  ±0    2 suites  ±0   1s ⏱️ ±0s
119 tests ±0  119 ✅ ±0  0 💤 ±0  0 ❌ ±0 
121 runs  ±0  121 ✅ ±0  0 💤 ±0  0 ❌ ±0 

Results for commit cfe558d. ± Comparison against base commit d554968.

♻️ This comment has been updated with latest results.

@WantClue WantClue added the enhancement New feature or request label Aug 1, 2026
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2 participants