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@kroening kroening commented Aug 26, 2025

SystemVerilog 1800-2005 has introduced the .* operator, used for

a) implicit port connections, and

b) patterns.

This adds support to the scanner, parser, and type checker for wildcard port connections.

@kroening kroening force-pushed the systemverilog-dot-asteric branch 5 times, most recently from 3abdcd9 to ad4dc2d Compare August 28, 2025 18:46
Port connections of a module instance can be named or positional.  This adds
two helper methods to distinguish these two cases.
SystemVerilog 1800-2005 has introduced the .* operator, used for

a) wildcard port connections (23.3.2.4), and

b) wildcard patterns (12.6).

This adds support to the scanner, parser, and type checker for wildcard port connections.
@kroening kroening force-pushed the systemverilog-dot-asteric branch from ad4dc2d to 1940921 Compare September 16, 2025 02:12
@kroening kroening changed the title SystemVerilog .* SystemVerilog .* wildcard port connections Sep 16, 2025
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