[release/10.0] JIT: fix crash in LSRA seen on VMR build on AVX-512 machines #119270
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Backport of #119206 to release/10.0
/cc @AndyAyersMS
Customer Impact
Found by @omajid
Regression
The compiler was executing
1ULL << xforx > 63as part of a chain of allocation heuristics. This shift is undefined behavior, and when the JIT was built with GCC and running on AVX-512, the heuristic unexpectedly started failing. The next heuristic up was not prepared for this and caused and AV.The bug was introduced when we extended LSRA to support in #113988; this created more than 64 allocatable registers on xarch.
Testing
Verified locally that source builds passed; @omajid also verified the fix worked.
Risk
Low. No diffs. There was an alternate code available that can handle more than 64 registers which we already using for ARM64; now we use it for all ISAs.