ggml-cuda: HIP replace __shfl_xor_sync with dpp instructions

[thelittlefireman]

Overview

Change __shfl_xor_sync to dpp instructions for little speed on HIP.

Additional information

The original code is not mine it was proposed by @maximumbusdatatype in the PR
16291

I add compatibility for architecture == GFX9. Cause row_share hip_move_dpp<0x160 + X> and row_xmask are not supported before GFX10

Benchmark:

master

$ ./llama-bench -hf unsloth/Qwen3.6-27B-MTP-GGUF:Q6_K --device ROCm2 -fa 1 -ngl 999 -sm tensor -p 16,32,64,128,256,512,1024,2048 -n 128"
ggml_cuda_init: found 3 ROCm devices (Total VRAM: 98256 MiB):
  Device 0: AMD Radeon Graphics, gfx906:sramecc+:xnack- (0x906), VMM: no, Wave Size: 64, VRAM: 32752 MiB
  Device 1: AMD Radeon Graphics, gfx906:sramecc+:xnack- (0x906), VMM: no, Wave Size: 64, VRAM: 32752 MiB
  Device 2: AMD Radeon Graphics, gfx906:sramecc+:xnack- (0x906), VMM: no, Wave Size: 64, VRAM: 32752 MiB
get_repo_commit: error: HTTPLIB failed: SSL server verification failed
get_repo_files: failed to resolve commit for unsloth/Qwen3.6-27B-MTP-GGUF
| model                          |       size |     params | backend    | ngl |     sm |  fa | dev          |            test |                  t/s |
| ------------------------------ | ---------: | ---------: | ---------- | --: | -----: | --: | ------------ | --------------: | -------------------: |
| qwen35 27B Q6_K                |  21.30 GiB |    27.32 B | ROCm       | 999 | tensor |   1 | ROCm2        |            pp16 |         81.69 ± 1.68 |
| qwen35 27B Q6_K                |  21.30 GiB |    27.32 B | ROCm       | 999 | tensor |   1 | ROCm2        |            pp32 |        101.51 ± 0.09 |
| qwen35 27B Q6_K                |  21.30 GiB |    27.32 B | ROCm       | 999 | tensor |   1 | ROCm2        |            pp64 |        123.20 ± 0.17 |
| qwen35 27B Q6_K                |  21.30 GiB |    27.32 B | ROCm       | 999 | tensor |   1 | ROCm2        |           pp128 |        135.57 ± 1.80 |
| qwen35 27B Q6_K                |  21.30 GiB |    27.32 B | ROCm       | 999 | tensor |   1 | ROCm2        |           pp256 |        153.32 ± 0.12 |
| qwen35 27B Q6_K                |  21.30 GiB |    27.32 B | ROCm       | 999 | tensor |   1 | ROCm2        |           pp512 |        159.28 ± 0.16 |
| qwen35 27B Q6_K                |  21.30 GiB |    27.32 B | ROCm       | 999 | tensor |   1 | ROCm2        |          pp1024 |        157.30 ± 0.05 |
| qwen35 27B Q6_K                |  21.30 GiB |    27.32 B | ROCm       | 999 | tensor |   1 | ROCm2        |          pp2048 |        156.16 ± 0.05 |
| qwen35 27B Q6_K                |  21.30 GiB |    27.32 B | ROCm       | 999 | tensor |   1 | ROCm2        |           tg128 |         18.68 ± 0.01 |

build: bb4e0e1 (1)

This PR

$ ./llama-bench -hf unsloth/Qwen3.6-27B-MTP-GGUF:Q6_K --device ROCm2 -fa 1 -ngl 999 -sm tensor -p 16,32,64,128,256,512,1024,2048 -n 128"
ggml_cuda_init: found 3 ROCm devices (Total VRAM: 98256 MiB):
  Device 0: AMD Radeon Graphics, gfx906:sramecc+:xnack- (0x906), VMM: no, Wave Size: 64, VRAM: 32752 MiB
  Device 1: AMD Radeon Graphics, gfx906:sramecc+:xnack- (0x906), VMM: no, Wave Size: 64, VRAM: 32752 MiB
  Device 2: AMD Radeon Graphics, gfx906:sramecc+:xnack- (0x906), VMM: no, Wave Size: 64, VRAM: 32752 MiB
get_repo_commit: error: HTTPLIB failed: SSL server verification failed
get_repo_files: failed to resolve commit for unsloth/Qwen3.6-27B-MTP-GGUF
| model                          |       size |     params | backend    | ngl |     sm |  fa | dev          |            test |                  t/s |
| ------------------------------ | ---------: | ---------: | ---------- | --: | -----: | --: | ------------ | --------------: | -------------------: |
| qwen35 27B Q6_K                |  21.30 GiB |    27.32 B | ROCm       | 999 | tensor |   1 | ROCm2        |            pp16 |         81.88 ± 2.17 |
| qwen35 27B Q6_K                |  21.30 GiB |    27.32 B | ROCm       | 999 | tensor |   1 | ROCm2        |            pp32 |        101.78 ± 0.08 |
| qwen35 27B Q6_K                |  21.30 GiB |    27.32 B | ROCm       | 999 | tensor |   1 | ROCm2        |            pp64 |        124.20 ± 0.10 |
| qwen35 27B Q6_K                |  21.30 GiB |    27.32 B | ROCm       | 999 | tensor |   1 | ROCm2        |           pp128 |        137.65 ± 0.03 |
| qwen35 27B Q6_K                |  21.30 GiB |    27.32 B | ROCm       | 999 | tensor |   1 | ROCm2        |           pp256 |        155.09 ± 0.05 |
| qwen35 27B Q6_K                |  21.30 GiB |    27.32 B | ROCm       | 999 | tensor |   1 | ROCm2        |           pp512 |        160.64 ± 0.07 |
| qwen35 27B Q6_K                |  21.30 GiB |    27.32 B | ROCm       | 999 | tensor |   1 | ROCm2        |          pp1024 |        159.65 ± 0.06 |
| qwen35 27B Q6_K                |  21.30 GiB |    27.32 B | ROCm       | 999 | tensor |   1 | ROCm2        |          pp2048 |        159.26 ± 0.05 |
| qwen35 27B Q6_K                |  21.30 GiB |    27.32 B | ROCm       | 999 | tensor |   1 | ROCm2        |           tg128 |         19.24 ± 0.02 |

build: cf90603 (1)

@maximumbusdatatype: Do you agree to use this code ?

Requirements

• I have read and agree with the contributing guidelines
• AI usage disclosure: YES : Use for understanding and testing

Currently only a DRAFT. Benchmark and clean description will follow.

[maximumbusdatatype]

@maximumbusdatatype: Do you agree to use this code ?

Sure thing! You or anyone else, are welcome to use this code as they see fit.