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[Draft] Fix issue in non-64 bytes aligned base of 2D block IO. #3397

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[Draft] Fix issue in non-64 bytes aligned base of 2D block IO. #3397

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chengjunlu
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Test the performance of the changes by compensate the offset with-in 64 bytes to offsetX and baseWidth to the block IO.

@whitneywhtsang whitneywhtsang marked this pull request as draft February 11, 2025 15:30
@LiyangLingIntel
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Just triggered the benchmark workflow: https://github.com/intel/intel-xpu-backend-for-triton/actions/runs/13279316967
We can see the performance impact when it's done.

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@whitneywhtsang whitneywhtsang Awaiting requested review from whitneywhtsang

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@chengjunlu @LiyangLingIntel