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[SYCL][Clang] Add ARM64_SPIRV64 and ARM64SPIR64 target info #18859

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[SYCL][Clang] Add ARM64_SPIRV64 and ARM64SPIR64 target info #18859

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@hdelan hdelan commented Jun 9, 2025 •
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Add TargetInfo for MSVC ARM64 host with SPIR64 or SPIRV64 device target.

@hdelan hdelan requested a review from a team as a code owner June 9, 2025 09:37
@hdelan hdelan changed the title Add ARM64_SPIRV64 and ARM64SPIR64 target info [SYCL][Clang] Add ARM64_SPIRV64 and ARM64SPIR64 target info Jun 9, 2025
@hdelan hdelan force-pushed the arm64-clang-info branch from 09dd1ab to 8ca8824 Compare June 9, 2025 09:46
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hdelan commented Jun 9, 2025

Hello frens @intel/llvm-reviewers-cuda

@hdelan hdelan force-pushed the arm64-clang-info branch from 8ca8824 to 83bf4de Compare June 9, 2025 10:15
@hdelan hdelan force-pushed the arm64-clang-info branch from 83bf4de to 41e1f96 Compare June 9, 2025 10:16
@hdelan hdelan temporarily deployed to WindowsCILock June 9, 2025 10:16 — with GitHub Actions Inactive
@hdelan hdelan temporarily deployed to WindowsCILock June 9, 2025 10:43 — with GitHub Actions Inactive
@hdelan hdelan temporarily deployed to WindowsCILock June 9, 2025 10:43 — with GitHub Actions Inactive
ldrumm
ldrumm reviewed Jun 9, 2025
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Report fatal error instead of assert
c822b05 
Instead of asserting false, report a fatal error if the user
provided triple is MSVC and not ARM64 or x64_64 when using
SPIR64 or SPIRV64 device.
@hdelan hdelan temporarily deployed to WindowsCILock June 9, 2025 14:28 — with GitHub Actions Inactive
@hdelan hdelan temporarily deployed to WindowsCILock June 9, 2025 15:25 — with GitHub Actions Inactive
@hdelan hdelan temporarily deployed to WindowsCILock June 9, 2025 15:25 — with GitHub Actions Inactive
steffenlarsen
steffenlarsen reviewed Jun 10, 2025
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@hdelan hdelan temporarily deployed to WindowsCILock June 10, 2025 07:27 — with GitHub Actions Inactive
steffenlarsen
steffenlarsen approved these changes Jun 10, 2025
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I think it looks good, but I wonder if this could benefit upstream LLVM as well. Seems like at least some of it is independent of SYCL.

@hdelan hdelan temporarily deployed to WindowsCILock June 10, 2025 07:58 — with GitHub Actions Inactive
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I think it looks good, but I wonder if this could benefit upstream LLVM as well. Seems like at least some of it is independent of SYCL.

I'm not 100% sure there is the basic infrastructure yet for this. But I think it would be nice to stop creating these hardcoded subvariants (it'll probably not fly well upstream anyway), they are hacks and it doesn't scale. E.g. AMD has one TargetInfo and NV has 2 (for the 32 and 64 variants) and that enough to support all host...

We only need the SPIRTargetInfo, SPIR64TargetInfo, SPIRV32TargetInfo and SPIRV64TargetInfo variants and a proper implementation of setAuxTarget to copy the info from the host triple. NOTE: SPIRVTargetInfo is for the Shader variant, so not required for SYCL.

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@hdelan @Naghasan @ldrumm @steffenlarsen