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[SYCL][Clang] Add ARM64_SPIRV64 and ARM64SPIR64 target info #18859

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Merged
merged 5 commits into from
Jun 18, 2025
Merged

[SYCL][Clang] Add ARM64_SPIRV64 and ARM64SPIR64 target info #18859

merged 5 commits into from
Jun 18, 2025
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hdelan
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@hdelan hdelan commented Jun 9, 2025 •
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Add TargetInfo for MSVC ARM64 host with SPIR64 or SPIRV64 device target.

@hdelan hdelan requested a review from a team as a code owner June 9, 2025 09:37
@hdelan hdelan changed the title Add ARM64_SPIRV64 and ARM64SPIR64 target info [SYCL][Clang] Add ARM64_SPIRV64 and ARM64SPIR64 target info Jun 9, 2025
@hdelan hdelan force-pushed the arm64-clang-info branch from 09dd1ab to 8ca8824 Compare June 9, 2025 09:46
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hdelan commented Jun 9, 2025

Hello frens @intel/llvm-reviewers-cuda

@hdelan hdelan force-pushed the arm64-clang-info branch 2 times, most recently from 83bf4de to 41e1f96 Compare June 9, 2025 10:16
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ldrumm
ldrumm reviewed Jun 9, 2025
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steffenlarsen
steffenlarsen reviewed Jun 10, 2025
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steffenlarsen approved these changes Jun 10, 2025
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I think it looks good, but I wonder if this could benefit upstream LLVM as well. Seems like at least some of it is independent of SYCL.

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I think it looks good, but I wonder if this could benefit upstream LLVM as well. Seems like at least some of it is independent of SYCL.

I'm not 100% sure there is the basic infrastructure yet for this. But I think it would be nice to stop creating these hardcoded subvariants (it'll probably not fly well upstream anyway), they are hacks and it doesn't scale. E.g. AMD has one TargetInfo and NV has 2 (for the 32 and 64 variants) and that enough to support all host...

We only need the SPIRTargetInfo, SPIR64TargetInfo, SPIRV32TargetInfo and SPIRV64TargetInfo variants and a proper implementation of setAuxTarget to copy the info from the host triple. NOTE: SPIRVTargetInfo is for the Shader variant, so not required for SYCL.

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hdelan commented Jun 12, 2025

So for now do you think it's OK to merge this patch and add a TODO for upstreaming? Looks like some refactoring is needed in order to get something that would be agreeable to upstream.

@hdelan hdelan force-pushed the arm64-clang-info branch from 5ef7df1 to f046ec5 Compare June 12, 2025 15:52
@hdelan hdelan requested a review from a team as a code owner June 12, 2025 15:52
@hdelan hdelan requested a review from sergey-semenov June 12, 2025 15:52
hdelan added 3 commits June 12, 2025 16:53
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Add ARM64_SPIRV64 and ARM64SPIR64 target info
2090f8b
@hdelan
Report fatal error instead of assert
5af7183 
Instead of asserting false, report a fatal error if the user
provided triple is MSVC and not ARM64 or x64_64 when using
SPIR64 or SPIRV64 device.
@hdelan
Don't use else after a return
263aee0
@hdelan hdelan force-pushed the arm64-clang-info branch from f046ec5 to 1f9fd12 Compare June 12, 2025 15:54
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Naghasan
Naghasan reviewed Jun 16, 2025
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So for now do you think it's OK to merge this patch and add a TODO for upstreaming? Looks like some refactoring is needed in order to get something that would be agreeable to upstream.

That would work for me if you also create an issue :) Assign that to me and I'll dispatch that to the FE looking after the upstreaming.

Allow base class to define host macro
568c2c8 
_M_ARM64 will be defined by the base getTargetDefines instance. Add a
test to verify this.
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Naghasan
Naghasan approved these changes Jun 17, 2025
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LGTM

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hdelan commented Jun 18, 2025

Thanks @Naghasan ! Ping @intel/dpcpp-cfe-reviewers

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hdelan commented Jun 18, 2025

Ping @intel/llvm-gatekeepers this is good to go 🙏

ldrumm
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authorship inconsistent

@ldrumm ldrumm merged commit e1d1ab5 into intel:sycl Jun 18, 2025
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@hdelan hdelan deleted the arm64-clang-info branch June 18, 2025 11:13
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@ldrumm ldrumm ldrumm approved these changes

@Naghasan Naghasan Naghasan approved these changes

@Fznamznon Fznamznon Fznamznon approved these changes

@steffenlarsen steffenlarsen steffenlarsen approved these changes

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