Tiled MMA tests using XE_DPAS_TT

[rishi-yadav]

Intel XE DPAS Tests - Combined Data Types

Test Category	Data Types	M Dimensions	Template Pattern	Tile Configurations
MMA	S8/U8 (8 tests)	8×16, 4×16, 2×16, 1×16	XE_DPAS_TT<M, int32_t, int8_t/uint8_t>	64×64×8×16×32 to 8×64×1×16×32
MMA	BF16 (4 tests)	8×16, 4×16, 2×16, 1×16	XE_DPAS_TT<M, float, bfloat16_t>	256×256×32×64×32 to 8×64×1×16×16
MMA	F16 (4 tests)	8×16, 4×16, 2×16, 1×16	XE_DPAS_TT<M, float, half_t>	64×64×8×16×16 to 8×64×1×16×16
MMA	TF32 (4 tests)	8×16, 4×16, 2×16, 1×16	XE_DPAS_TT<M, float, tfloat32_t>	64×64×8×16×32 to 64×64×8×16×16
TiledMMA	BF16 (3 tests)	8×16 (all)	XE_DPAS_TT<8, float, bfloat16_t>	256×256×32, 128×64×32 (various SG layouts)

Summary by Category

• Integer Types (S8/U8): 8 tests
• Floating Point (BF16/F16/TF32): 12 tests
• Template Validation (TiledMMA): 3 tests

Total: 23 tests PASSED - Complete Intel XE DPAS modern API coverage across 5 data types and multiple tiling strategies.

[rolandschulz]

This is not ideal that this is hard coded. Could you see whether there is some way to detect this so we don't need to update this manual when the driver changes? Can be in a follow up PR.