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Commit 4380043

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n1tram1Martin Schmidt
authored and
Martin Schmidt
committed
remove unused code
1 parent fc62d40 commit 4380043

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7 files changed

+10
-110
lines changed

7 files changed

+10
-110
lines changed

hal_aarch64/src/irq.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -184,7 +184,7 @@ impl Aarch64Irqs {
184184
impl IrqOps for Aarch64Irqs {
185185
fn init(&'static self) {
186186
cortex_a::registers::VBAR_EL1.set(el1_vector_table as u64);
187-
unsafe { IRQS.set(self).expect("looks like init has already been called") };
187+
IRQS.set(self).expect("looks like init has already been called");
188188
}
189189

190190
fn init_irq_chip(&self, _allocator: &impl PageAlloc) -> Result<(), Error> {

hal_aarch64/src/mm/mod.rs

Lines changed: 0 additions & 46 deletions
Original file line numberDiff line numberDiff line change
@@ -1,47 +1 @@
1-
use hal_core::{
2-
mm::{self, PageAlloc, PageMap},
3-
AddressRange, Error,
4-
};
5-
61
pub mod pgt48;
7-
8-
use pgt48::PageTable;
9-
10-
pub type EntryType = usize;
11-
12-
pub const PAGE_SIZE: usize = PageTable::PAGE_SIZE;
13-
14-
use core::cell::OnceCell;
15-
16-
static mut GPT: OnceCell<&'static mut PageTable> = OnceCell::new();
17-
18-
pub fn is_pagetable_installed() -> bool {
19-
unsafe { GPT.get_mut().is_some() }
20-
}
21-
22-
pub fn prefill_pagetable(
23-
r: impl Iterator<Item = AddressRange>,
24-
rw: impl Iterator<Item = AddressRange>,
25-
rwx: impl Iterator<Item = AddressRange>,
26-
pre_allocated: impl Iterator<Item = AddressRange>,
27-
allocator: &impl PageAlloc,
28-
) -> Result<(), Error> {
29-
let pt = hal_core::mm::prefill_pagetable::<PageTable>(r, rw, rwx, pre_allocated, allocator)?;
30-
31-
// TODO: put into into the hal_core::Error
32-
unsafe {
33-
if GPT.set(pt).is_err() {
34-
panic!("GPT is already set ?");
35-
}
36-
};
37-
38-
Ok(())
39-
}
40-
41-
pub fn align_up(addr: usize) -> usize {
42-
mm::align_up(addr, PAGE_SIZE)
43-
}
44-
45-
pub fn align_down(addr: usize) -> usize {
46-
mm::align_down(addr, PAGE_SIZE)
47-
}

hal_riscv64/src/cpu.rs

Lines changed: 0 additions & 12 deletions
This file was deleted.

hal_riscv64/src/irq.rs

Lines changed: 8 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -1,16 +1,14 @@
11
use hal_core::{
2-
mm::{PageAlloc, PageMap, Permissions, VAddr},
2+
mm::PageAlloc,
33
Error, TimerCallbackFn,
44
IrqOps,
55
once_lock::OnceLock,
66
};
77

88
use log;
99

10-
use super::mm;
1110
use super::plic::Plic;
1211
use super::registers;
13-
use super::cpu;
1412

1513
use core::arch::asm;
1614
use core::ptr;
@@ -21,6 +19,7 @@ use sbi;
2119

2220
static IRQS: OnceLock<&Riscv64Irqs> = OnceLock::new();
2321

22+
#[derive(Debug)]
2423
pub struct Riscv64Irqs {
2524
irq_chip: OnceLock<Plic>,
2625
timer_callback: AtomicPtr<TimerCallbackFn>,
@@ -31,17 +30,20 @@ unsafe impl Sync for Riscv64Irqs {}
3130
impl IrqOps for Riscv64Irqs {
3231
fn init(&'static self) {
3332
registers::set_stvec(asm_trap_handler as usize);
34-
IRQS.set(self);
33+
IRQS.set(self).expect("Looks like Riscv64Irqs::init has already been called, must only be called once !");
3534
}
3635

3736
fn unmask_interrupts(&self) {
38-
cpu::unmask_interrupts();
37+
registers::set_sstatus_sie();
38+
registers::set_sie_ssie();
39+
registers::set_sie_seie();
40+
registers::set_sie_stie();
3941
}
4042

4143

4244
fn init_irq_chip(&self, _allocator: &impl PageAlloc) -> Result<(), Error> {
4345
let base = 0xc000000;
44-
self.irq_chip.set(Plic::new(base));
46+
self.irq_chip.set(Plic::new(base)).expect("Riscv64Irqs has already been called");
4547

4648
Ok(())
4749
}
@@ -91,7 +93,6 @@ impl Riscv64Irqs {
9193
e => panic!("getting caught by unhandler exception {:?}", e),
9294
}
9395
}
94-
9596
}
9697

9798
#[derive(Debug, Copy, Clone)]

hal_riscv64/src/lib.rs

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2,7 +2,6 @@
22
#![feature(fn_align)]
33
#![feature(naked_functions)]
44

5-
pub mod cpu;
65
pub mod irq;
76
pub mod mm;
87
mod plic;

hal_riscv64/src/mm/mod.rs

Lines changed: 0 additions & 43 deletions
Original file line numberDiff line numberDiff line change
@@ -1,44 +1 @@
1-
use core::arch::asm;
2-
use core::cell::OnceCell;
3-
use hal_core::{
4-
mm::{self, PageAlloc, PageMap},
5-
AddressRange, Error,
6-
};
7-
81
pub mod sv39;
9-
use sv39::{PageTable, Satp, SatpMode};
10-
11-
pub const PAGE_SIZE: usize = PageTable::PAGE_SIZE;
12-
13-
static mut GPT: OnceCell<&'static mut PageTable> = OnceCell::new();
14-
15-
pub fn current() -> &'static mut PageTable {
16-
unsafe { GPT.get_mut().unwrap() }
17-
}
18-
19-
pub fn prefill_pagetable(
20-
r: impl Iterator<Item = AddressRange>,
21-
rw: impl Iterator<Item = AddressRange>,
22-
rwx: impl Iterator<Item = AddressRange>,
23-
pre_allocated: impl Iterator<Item = AddressRange>,
24-
allocator: &impl PageAlloc,
25-
) -> Result<(), Error> {
26-
let pt = hal_core::mm::prefill_pagetable::<PageTable>(r, rw, rwx, pre_allocated, allocator)?;
27-
28-
// TODO: put into into the hal_core::Error
29-
unsafe {
30-
if GPT.set(pt).is_err() {
31-
panic!("GPT is already set ?");
32-
}
33-
};
34-
35-
Ok(())
36-
}
37-
38-
pub fn align_down(addr: usize) -> usize {
39-
mm::align_down(addr, PageTable::PAGE_SIZE)
40-
}
41-
42-
pub fn align_up(addr: usize) -> usize {
43-
mm::align_up(addr, PageTable::PAGE_SIZE)
44-
}

hal_riscv64/src/plic.rs

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -9,6 +9,7 @@ const PLIC_NUMBER_SOURCE_REGISTER: u16 =
99
const PLIC_MAX_CONTEXT: u16 = 0x3e00;
1010
const PLIC_CLAIM_OFFSET: usize = 0x201004;
1111

12+
#[derive(Debug)]
1213
pub struct Plic {
1314
base_register_address: usize,
1415
}

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