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10 changes: 5 additions & 5 deletions packages/mesa/0003-fix-for-anon-file.patch
Original file line number Diff line number Diff line change
Expand Up @@ -2,12 +2,12 @@ Fallback to `@TERMUX_PREFIX@/tmp` if env `XDG_RUNTIME_DIR` is not set.

--- a/src/util/anon_file.c
+++ b/src/util/anon_file.c
@@ -122,7 +122,7 @@ get_or_create_user_temp_dir(char* buf, size_t len) {
@@ -125,7 +125,7 @@ get_or_create_user_temp_dir(void) {
return buf;
}

- snprintf(buf, len, "/tmp/xdg-runtime-mesa-%ld", (long)getuid());
+ snprintf(buf, len, "@TERMUX_PREFIX@/tmp/xdg-runtime-mesa-%ld", (long)getuid());
- n = asprintf(&buf, "/tmp/xdg-runtime-mesa-%ld", (long)getuid());
+ n = asprintf(&buf, "@TERMUX_PREFIX@/tmp/xdg-runtime-mesa-%ld", (long)getuid());
if (n < 0)
return NULL;
mesa_logd("%s: XDG_RUNTIME_DIR not set; falling back to temp dir %s",
__func__, buf);
if (stat(buf, &st) == 0) {
27 changes: 5 additions & 22 deletions packages/mesa/0007-use-mtx_t-operations-in-turnip.patch
Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
--- a/src/freedreno/vulkan/tu_shader.cc
+++ b/src/freedreno/vulkan/tu_shader.cc
@@ -1980,10 +1980,10 @@
@@ -2694,10 +2694,10 @@ tu_upload_shader(struct tu_device *dev,
size += vpc_size;
}

Expand All @@ -13,7 +13,7 @@

if (result != VK_SUCCESS)
return result;
@@ -2013,9 +2013,9 @@
@@ -2727,9 +2727,9 @@ tu_upload_shader(struct tu_device *dev,

result = tu_setup_pvtmem(dev, shader, &pvtmem_config, pvtmem_size, per_wave);
if (result != VK_SUCCESS) {
Expand All @@ -25,7 +25,7 @@
return result;
}

@@ -2419,10 +2419,10 @@
@@ -3531,10 +3531,10 @@ tu_empty_shader_create(struct tu_device *dev,
if (!shader)
return VK_ERROR_OUT_OF_HOST_MEMORY;

Expand All @@ -38,9 +38,9 @@

if (result != VK_SUCCESS) {
vk_free(&dev->vk.alloc, shader);
@@ -2528,9 +2528,9 @@
{
@@ -3645,9 +3645,9 @@ tu_shader_destroy(struct tu_device *dev,
tu_cs_finish(&shader->cs);
TU_RMV(resource_destroy, dev, &shader->bo);

- pthread_mutex_lock(&dev->pipeline_mutex);
+ mtx_lock(&dev->pipeline_mutex);
Expand All @@ -50,20 +50,3 @@

if (shader->pvtmem_bo)
tu_bo_finish(dev, shader->pvtmem_bo);
--- a/src/vulkan/wsi/wsi_common_wayland.c
+++ b/src/vulkan/wsi/wsi_common_wayland.c
@@ -2648,12 +2648,12 @@ wsi_wl_swapchain_wait_for_present2(struct wsi_swapchain *wsi_chain,
return result;

while (1) {
- err = pthread_mutex_lock(&chain->present_ids.lock);
+ err = mtx_lock(&chain->present_ids.lock);
if (err != 0)
return VK_ERROR_OUT_OF_DATE_KHR;

bool completed = chain->present_ids.max_completed >= present_id;
- pthread_mutex_unlock(&chain->present_ids.lock);
+ mtx_unlock(&chain->present_ids.lock);

if (completed)
return VK_SUCCESS;
24 changes: 0 additions & 24 deletions packages/mesa/0019-UBWC_5-and-UBWC_6-support.patch

This file was deleted.

85 changes: 0 additions & 85 deletions packages/mesa/0020-unofficial-support-adreno-830.patch

This file was deleted.

168 changes: 0 additions & 168 deletions packages/mesa/0021-unofficial-support-adreno-810-825-829.patch

This file was deleted.

41 changes: 41 additions & 0 deletions packages/mesa/0021-unofficial-support-adreno-825.patch
Original file line number Diff line number Diff line change
@@ -0,0 +1,41 @@
freedreno/common: enable A825

The source code is from whitebelyash:
https://github.com/whitebelyash/mesa-unified/commit/efb4500439dca28f50bc6c874e271708dca2f821

diff --git a/src/freedreno/common/freedreno_devices.py b/src/freedreno/common/freedreno_devices.py
index 4b2a004af7c..9f9f914c9ec 100644
--- a/src/freedreno/common/freedreno_devices.py
+++ b/src/freedreno/common/freedreno_devices.py
@@ -1423,6 +1423,31 @@ add_gpus([
raw_magic_regs = a8xx_base_raw_magic_regs,
))

+add_gpus([
+ GPUId(chip_id=0x44030000, name="Adreno (TM) 825"),
+ ], A6xxGPUInfo(
+ CHIP.A8XX,
+ [a7xx_base, a7xx_gen3, a8xx_base, a8xx_gen1, GPUProps(
+ # This is probably not an optimal config for gmem/sysmem, but it was working before and I don't have any 825 device to test (neither I have any trace info)
+ sysmem_ccu_color_cache_fraction = CCUColorCacheFraction.FULL.value,
+ sysmem_per_ccu_color_cache_size = 128 * 1024,
+ sysmem_ccu_depth_cache_fraction = CCUColorCacheFraction.THREE_QUARTER.value,
+ sysmem_per_ccu_depth_cache_size = 96 * 1024,
+ )],
+ num_ccu = 4,
+ num_slices = 2,
+ tile_align_w = 96,
+ tile_align_h = 32,
+ tile_max_w = 16416,
+ tile_max_h = 16384,
+ num_vsc_pipes = 32,
+ cs_shared_mem_size = 32 * 1024,
+ wave_granularity = 2,
+ fibers_per_sp = 128 * 2 * 16,
+ magic_regs = dict(),
+ raw_magic_regs = a8xx_base_raw_magic_regs,
+ ))
+
add_gpus([
GPUId(chip_id=0xffff44050A31, name="Adreno (TM) 840"),
], A6xxGPUInfo(
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