Skip to content

[CIR][CIRGen][Builtin][X86] Lower __rdtscp #1686

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Open
wants to merge 1 commit into
base: main
Choose a base branch
from
Open

[CIR][CIRGen][Builtin][X86] Lower __rdtscp #1686

Show file tree
Hide file tree
Changes from all commits
Commits
Show all changes
1 commit
Select commit
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
21 changes: 21 additions & 0 deletions clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -144,5 +144,26 @@ mlir::Value CIRGenFunction::emitX86BuiltinExpr(unsigned BuiltinID,
getLoc(E->getExprLoc()), builder.getStringAttr("x86.rdtsc"), intTy)
.getResult();
}
case X86::BI__builtin_ia32_rdtscp: {

// For rdtscp, we need to create a proper struct type to hold {i64, i32}
cir::RecordType resTy = builder.getAnonRecordTy(
{builder.getUInt64Ty(), builder.getUInt32Ty()}, false, false);

auto call = builder
.create<cir::LLVMIntrinsicCallOp>(
getLoc(E->getExprLoc()),
builder.getStringAttr("x86.rdtscp"), resTy)
.getResult();

// Store processor ID in address param
mlir::Value pID = builder.create<cir::ExtractMemberOp>(
getLoc(E->getExprLoc()), builder.getUInt32Ty(), call, 1);
builder.create<cir::StoreOp>(getLoc(E->getExprLoc()), pID, Ops[0]);

// Return the timestamp at index 0
return builder.create<cir::ExtractMemberOp>(getLoc(E->getExprLoc()),
builder.getUInt64Ty(), call, 0);
}
}
}
9 changes: 0 additions & 9 deletions clang/test/CIR/CodeGen/X86/builtins-x86.c
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -45,12 +45,3 @@ void test_mm_sfence() {
// CIR: {{%.*}} = cir.llvm.intrinsic "x86.sse.sfence" : () -> !void
// LLVM: call void @llvm.x86.sse.sfence()
}

unsigned long long test_rdtsc() {
// CIR-LABEL: @test_rdtsc
// LLVM-LABEL: @test_rdtsc
return __rdtsc();
// CIR: {{%.*}} = cir.llvm.intrinsic "x86.rdtsc" : () -> !u64i
// LLVM: call i64 @llvm.x86.rdtsc
}

35 changes: 35 additions & 0 deletions clang/test/CIR/CodeGen/X86/rd-builtins.c
View file
Open in desktop
Original file line number Diff line number Diff line change
@@ -0,0 +1,35 @@
// RUN: %clang_cc1 -ffreestanding -triple x86_64-unknown-linux -Wno-implicit-function-declaration -fclangir -emit-cir -o %t.cir %s
// RUN: FileCheck --check-prefix=CIR --input-file=%t.cir %s
// RUN: %clang_cc1 -ffreestanding -triple x86_64-unknown-linux -Wno-implicit-function-declaration -fclangir -emit-llvm -o %t.ll %s
// RUN: FileCheck --check-prefix=LLVM --input-file=%t.ll %s

// This test mimics clang/test/CodeGen/X86/rd-builtins.c, which eventually
// CIR shall be able to support fully.

#include <x86intrin.h>

unsigned long long test_rdtsc() {
// CIR-LABEL: @test_rdtsc
// LLVM-LABEL: @test_rdtsc
return __rdtsc();
// CIR: {{%.*}} = cir.llvm.intrinsic "x86.rdtsc" : () -> !u64i
// LLVM: call i64 @llvm.x86.rdtsc
}

unsigned long long test_rdtscp(unsigned int *a) {

return __rdtscp(a);

// CIR-LABEL: @__rdtscp
// CIR: [[RDTSCP:%.*]] = cir.llvm.intrinsic "x86.rdtscp" : () -> !rec_anon_struct
// CIR: [[TSC_AUX:%.*]] = cir.extract_member [[RDTSCP]][1] : !rec_anon_struct -> !u32i
// CIR: cir.store [[TSC_AUX]], %{{.*}} : !u32i, !cir.ptr<!u32i>
// CIR: {{%.*}} = cir.extract_member [[RDTSCP]][0] : !rec_anon_struct -> !u64i

// LLVM: @test_rdtscp
// LLVM: [[RDTSCP:%.*]] = call { i64, i32 } @llvm.x86.rdtscp
// LLVM: [[TSC_AUX:%.*]] = extractvalue { i64, i32 } [[RDTSCP]], 1
// LLVM: store i32 [[TSC_AUX]], ptr %{{.*}}
// LLVM: [[TSC:%.*]] = extractvalue { i64, i32 } [[RDTSCP]], 0
}

Loading