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@drewrisinger drewrisinger commented Jun 22, 2021

Adds option to not supply CS pins to SPIInterface class.
Matches the capability in the iCE & XC7 differential SPI classes.

TODO:

  • Test. Tested trivially by running python ./misoc/cores/spi2.py, and also by removing "cs_n" item from the in-file test
    p0 = Record([("cs_n", 2), ("clk", 1), ("mosi", 1), ("miso", 1)])

Matches capability in differential versions
@drewrisinger drewrisinger force-pushed the dr-pr-spi2-allow-no-cs branch from 32d978e to fe23a9a Compare June 22, 2021 18:35
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