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perf(cpu): adopt .NET 10 AVX-512 TernaryLogic and widen gather#141

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mivertowski merged 1 commit intomainfrom
feat/simd-gather-scatter-ternary
Apr 22, 2026
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perf(cpu): adopt .NET 10 AVX-512 TernaryLogic and widen gather#141
mivertowski merged 1 commit intomainfrom
feat/simd-gather-scatter-ternary

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Summary

Five targeted adoption sites for the .NET 10 AVX-512 / AVX2 intrinsics surface in the CPU backend's reduction and branchless paths. All behaviour is byte-for-byte identical on non-AVX-512 hardware; AVX-512 hosts get fewer instructions per element.

Adoption sites

# Site What it does Why it helps
1 AdvancedSimdKernels.VectorGatherFloat32 Real Avx2.GatherVector256 replacing a scalar inner loop that was documented as a workaround One vpgatherdps vs 8 scalar loads
2 AdvancedSimdKernels.VectorScatterFloat32 Drops dead AVX-512 loads that preceded a scalar scatter; unrolled by 4 No SDK scatter intrinsic, but tighter code with less register pressure
3 AdvancedSimdPatterns.ConditionalSelectAvx512 Avx512F.TernaryLogic(..., 0xCA) instead of CompareGreaterThan + BlendVariable Single vpternlogd vs compare + blend
4 AdvancedSimdPatterns.ConditionalSelectSse Avx512F.VL.TernaryLogic replaces Sse.And/AndNot/Or triple when AVX-512VL is present One vpternlogd vs three SSE ops
5 AdvancedSimdPatterns.GatherFloat32Avx512 New 16-wide gather stitching two Avx2.GatherVector256 per iteration Doubles gather throughput on AVX-512 hosts without needing Avx512F.GatherVector512

Seven new correctness tests in SimdOperationsTests cover each changed path against a scalar reference.

Intrinsics wanted but not available

Avx512F.GatherVector512 and Avx512F.Scatter are not exposed in .NET 10 SDK 10.0.106 — System.Runtime.Intrinsics.X86.Avx512F only surfaces TernaryLogic, BlendVariable, arithmetic, and FMA. This is why Sites 1 and 5 stitch two AVX2 gathers instead of a single 512-bit gather, and Site 2 stays scalar. The code calls this out in XML remarks so the next revisit is obvious once the surface catches up.

Build and test

  • dotnet build DotCompute.sln --configuration Release -> 0 errors, 0 warnings
  • DotCompute.Backends.CPU.Tests -> 139/140 passing. The single failure (VectorOperations_Performance_SimdFasterThanScalar) is a pre-existing timing-based flake that passes in isolation and doesn't touch any modified code paths.
  • Other pre-existing Core test failures (5 in KernelDebug* and Recovery*) are unrelated to this PR.

Test plan

  • Correctness: 7 new unit tests pass on AVX2-only host (exercises AVX2 and scalar paths byte-identically)
  • Correctness: re-run on an AVX-512 host to exercise the TernaryLogic and stitched-gather paths
  • Optional: add BenchmarkDotNet scenario for GatherFloat32 once on AVX-512 hardware to measure the stitched-gather win

Scope discipline

  • No public API changes; all edits are internal optimisation
  • CUDA and Metal backends untouched
  • Only the three files below changed:
    • src/Backends/DotCompute.Backends.CPU/Kernels/AdvancedSimdKernels.cs
    • src/Backends/DotCompute.Backends.CPU/Kernels/AdvancedSimdPatterns.cs
    • tests/Unit/DotCompute.Backends.CPU.Tests/SimdOperationsTests.cs

🤖 Generated with Claude Code

Five targeted adoption sites in the CPU SIMD reduction/branchless paths:

1. AdvancedSimdKernels.VectorGatherFloat32: replaces the scalar inner
   loop (marked "Use scalar approach for gather" in a comment) with a
   real Avx2.GatherVector256. On AVX-512 hosts, issues two back-to-back
   256-bit gathers per iteration to cover 16 floats at a time — .NET 10
   SDK 10.0.106 does not expose Avx512F.GatherVector512 directly, so
   stitching two AVX2 gathers is the widest form available.
2. AdvancedSimdKernels.VectorScatterFloat32: removes dead AVX-512 loads
   that preceded a scalar scatter loop. The SDK does not expose
   Avx512F.Scatter, so the scatter remains scalar but is now unrolled
   by 4 so the JIT can keep more stores in flight. Byte-identical result.
3. AdvancedSimdPatterns.ConditionalSelectAvx512: collapses the
   CompareGreaterThan + BlendVariable sequence to a single vpternlogd
   via Avx512F.TernaryLogic(trueVec, falseVec, mask, 0xCA). Truth table
   0xCA = (C ? A : B). One instruction instead of one blend.
4. AdvancedSimdPatterns.ConditionalSelectSse: on AVX-512VL-capable hosts
   the legacy Sse.And/AndNot/Or manual blend triple collapses to a
   single Vector128 vpternlogd via Avx512F.VL.TernaryLogic. SSE4.1 and
   pre-SSE4.1 fallbacks are preserved byte-for-byte.
5. AdvancedSimdPatterns.GatherFloat32: new GatherFloat32Avx512 branch
   processes 16 elements per iteration on AVX-512 hosts by stitching two
   Avx2.GatherVector256 calls, then delegating the remainder to the
   existing AVX2 and scalar paths.

Each site keeps its non-AVX-512 fallback intact and byte-identical. Seven
new correctness tests in SimdOperationsTests cover the changed paths
against a scalar reference and pass on AVX2-only hardware.

Build: dotnet build DotCompute.sln --configuration Release -> 0 errors,
       0 warnings. CPU unit tests: 139/140 pass (the one failure is a
       pre-existing timing-based flake, unrelated).

Not adopted (SDK gap): Avx512F.GatherVector512 and Avx512F.Scatter are
not exposed in .NET 10 SDK 10.0.106. Revisit once the x86 intrinsics
surface catches up.

Co-Authored-By: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
@mivertowski mivertowski merged commit e5d4678 into main Apr 22, 2026
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@mivertowski mivertowski deleted the feat/simd-gather-scatter-ternary branch April 22, 2026 07:09
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