ice2005

@SKKU, 2022

FPGA Verification : FPGA Starter Kit Ⅲ(Artix-7 Based FPGA)

Design DNN Computation Module

Figure of (NOC-based DNN accerlerator: A future design paradigm, KC Chen, M Ebrahimi, TY Wang, YC Yang, NOCS '19: Proceedings of the 13th IEEE/ACM International Symposium on Networks-on-Chip)

[Design Overview & Execution Flow]

[State Diagram of Controller]

[Block Diagram of Computation Modules]

Processing Element

1. Single PE Module

2. Systolic Array Module

3. Broadcast Computation Module

[Simulation Result]

[Systolic Array Module FPGA Verification]

[Custom Module FPGA Verification]

[Performance Comparison]