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Fix CoreSight discovery #1770

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Fix CoreSight discovery #1770

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fd0edf2
coresight: add apid handling
RobertRostohar Feb 25, 2025
4d36f03
coresight: add AP CSW register SPROT bit handling
RobertRostohar Mar 14, 2025
3a78de3
coresight: discovery: fix offset address for APv2
RobertRostohar Mar 24, 2025
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21 changes: 16 additions & 5 deletions pyocd/coresight/ap.py
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Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
# pyOCD debugger
# Copyright (c) 2015-2020 Arm Limited
# Copyright (c) 2015-2020,2025 Arm Limited
# Copyright (c) 2021-2023 Chris Reed
# SPDX-License-Identifier: Apache-2.0
#
Expand Down Expand Up @@ -206,10 +206,11 @@ class APAddressBase:
address format.
"""

def __init__(self, address: int, dp: int = 0) -> None:
def __init__(self, address: int, dp: int = 0, apid: int = 0) -> None:
"""@brief Constructor accepting the nominal address."""
self._nominal_address = address
self._dp = dp
self._apid = apid

@property
def ap_version(self) -> APVersion:
Expand Down Expand Up @@ -241,6 +242,11 @@ def dp_index(self) -> int:
"""@brief Index of the DP to which this AP is attached."""
return self._dp

@property
def apid(self) -> int:
"""@brief Unique AP identifier."""
return self._apid

def __hash__(self) -> int:
return hash(self.nominal_address | (self._dp << 64))

Expand Down Expand Up @@ -788,6 +794,10 @@ def _init_hprot() -> None:
LOG.debug("%s implemented HPROT=%x HNONSEC=%x", self.short_description, self._impl_hprot,
self._impl_hnonsec)

if (self._flags & AP_SPROT):
if (original_csw & CSW_SDEVICEEN) == 0:
self._hnonsec = NONSECURE

# Update current HPROT and HNONSEC, and the current base CSW value.
self.hprot = self._hprot & self._impl_hprot
self.hnonsec = self._hnonsec & self._impl_hnonsec
Expand Down Expand Up @@ -1355,6 +1365,7 @@ def find_components(self) -> None:
AP_ALL_TX_SZ = 0x2 # The AP is known to support 8-, 16-, and 32-bit transfers, *unless* Large Data is implemented.
AP_MSTRTYPE = 0x4 # The AP is known to support the MSTRTYPE field.
AP_DBGSWEN = 0x8 # The AP is known to support the DBGSWEN flag.
AP_SPROT = 0x10 # The AP is known to support the SPROT field.

## Map from AP IDR fields to AccessPort subclass.
#
Expand All @@ -1380,20 +1391,20 @@ def find_components(self) -> None:
# |JEP106 |Class |Var|Type |Name |Class
(AP_JEP106_ARM, AP_CLASS_JTAG_AP, 0, 0): ("JTAG-AP", AccessPort, 0 ),
(AP_JEP106_ARM, AP_CLASS_COM_AP, 0, 0): ("SDC-600", AccessPort, 0 ),
(AP_JEP106_ARM, AP_CLASS_MEM_AP, 0, AP_TYPE_AHB): ("AHB-AP", AHB_AP, AP_ALL_TX_SZ ),
(AP_JEP106_ARM, AP_CLASS_MEM_AP, 0, AP_TYPE_AHB): ("AHB-AP", AHB_AP, AP_ALL_TX_SZ|AP_SPROT ),
(AP_JEP106_ARM, AP_CLASS_MEM_AP, 1, AP_TYPE_AHB): ("AHB-AP", AHB_AP, AP_ALL_TX_SZ|AP_4K_WRAP|AP_MSTRTYPE ),
(AP_JEP106_ARM, AP_CLASS_MEM_AP, 2, AP_TYPE_AHB): ("AHB-AP", AHB_AP, AP_ALL_TX_SZ ),
(AP_JEP106_ARM, AP_CLASS_MEM_AP, 3, AP_TYPE_AHB): ("AHB-AP", AHB_AP, AP_ALL_TX_SZ ),
(AP_JEP106_ARM, AP_CLASS_MEM_AP, 4, AP_TYPE_AHB): ("AHB-AP", AHB_AP, AP_ALL_TX_SZ ),
(AP_JEP106_ARM, AP_CLASS_MEM_AP, 0, AP_TYPE_APB): ("APB-AP", MEM_AP, AP_DBGSWEN ),
(AP_JEP106_ARM, AP_CLASS_MEM_AP, 0, AP_TYPE_AXI): ("AXI-AP", MEM_AP, AP_ALL_TX_SZ ),
(AP_JEP106_ARM, AP_CLASS_MEM_AP, 0, AP_TYPE_AHB5): ("AHB5-AP", AHB_AP, AP_ALL_TX_SZ ),
(AP_JEP106_ARM, AP_CLASS_MEM_AP, 0, AP_TYPE_AHB5): ("AHB5-AP", AHB_AP, AP_ALL_TX_SZ|AP_SPROT ),
(AP_JEP106_ARM, AP_CLASS_MEM_AP, 1, AP_TYPE_AHB5): ("AHB5-AP", AHB_AP, AP_ALL_TX_SZ ),
(AP_JEP106_ARM, AP_CLASS_MEM_AP, 2, AP_TYPE_AHB5): ("AHB5-AP", AHB_AP, AP_ALL_TX_SZ ),
(AP_JEP106_ARM, AP_CLASS_MEM_AP, 0, AP_TYPE_APB4): ("APB4-AP", MEM_AP, 0 ),
(AP_JEP106_ARM, AP_CLASS_MEM_AP, 0, AP_TYPE_AXI5): ("AXI5-AP", MEM_AP, AP_ALL_TX_SZ ),
(AP_JEP106_ARM, AP_CLASS_MEM_AP, 1, AP_TYPE_AXI5): ("AXI5-AP", MEM_AP, AP_ALL_TX_SZ ),
(AP_JEP106_ARM, AP_CLASS_MEM_AP, 0, AP_TYPE_AHB5_HPROT): ("AHB5-AP", MEM_AP, AP_ALL_TX_SZ ),
(AP_JEP106_ARM, AP_CLASS_MEM_AP, 0, AP_TYPE_AHB5_HPROT): ("AHB5-AP", MEM_AP, AP_ALL_TX_SZ|AP_SPROT ),
(AP_JEP106_ARM_CHINA,
AP_CLASS_MEM_AP, 1, AP_TYPE_AHB5): ("AHB5-AP", AHB_AP, AP_ALL_TX_SZ ),
}
7 changes: 4 additions & 3 deletions pyocd/coresight/discovery.py
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Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
# pyOCD debugger
# Copyright (c) 2019-2020 Arm Limited
# Copyright (c) 2019-2020,2025 Arm Limited
# SPDX-License-Identifier: Apache-2.0
#
# Licensed under the Apache License, Version 2.0 (the "License");
Expand Down Expand Up @@ -258,8 +258,9 @@ def _create_root_component(self, cmpid):
"""
try:
# Create a memory interface for this component.
ap_address = APv2Address(cmpid.address)
memif = APAccessMemoryInterface(self.dp, ap_address)
# ap_address = APv2Address(cmpid.address)
# memif = APAccessMemoryInterface(self.dp, ap_address)
memif = APAccessMemoryInterface(self.dp)

# Instantiate the component and attach to the target.
component = cmpid.factory(memif, cmpid, cmpid.address)
Expand Down
4 changes: 2 additions & 2 deletions pyocd/debug/sequences/sequences.py
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Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
# pyOCD debugger
# Copyright (c) 2020 Arm Limited
# Copyright (c) 2020,2025 Arm Limited
# Copyright (c) 2021-2023 Chris Reed
# SPDX-License-Identifier: Apache-2.0
#
Expand Down Expand Up @@ -380,7 +380,7 @@ def _create_scope(self, context: DebugSequenceExecutionContext) -> Scope:
scope.set('__ap', default_ap_address.nominal_address
if isinstance(default_ap_address, APv1Address)
else 0)
scope.set('__apid', default_ap_address.nominal_address
scope.set('__apid', default_ap_address.apid
if isinstance(default_ap_address, APv2Address)
else 0)

Expand Down
14 changes: 8 additions & 6 deletions pyocd/target/pack/cmsis_pack.py
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Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
# -*- coding: utf-8 -*-
# pyOCD debugger
# Copyright (c) 2019-2020 Arm Limited
# Copyright (c) 2019-2020,2025 Arm Limited
# Copyright (c) 2020 Men Shiyun
# Copyright (c) 2020 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V.
# Copyright (c) 2021-2023 Chris Reed
Expand Down Expand Up @@ -352,7 +352,7 @@ def _extract_items(
return list(map.values())

def _inherit_attributes(self, to_elem: Element, from_elem: Optional[Element]) -> Element:
"""@brief Add attributes missing from an elemnt but present in another.
"""@brief Add attributes missing from an element but present in another.

Copy to `to_elem` any attributes defined in `from_elem` but not defined, and therefore overridden,
in `to_elem`.
Expand Down Expand Up @@ -1157,20 +1157,22 @@ def _handle_accessports(self) -> None:
f"{self.pack_description.pack_name} DFP ({self.part_number}): <{accessport.tag}> "
f"'__dp' attribute is invalid ({ap_dp})")

# Get the __apid attribute.
apid = self._get_int_attribute(accessport, '__apid')

# APv1
if accessport.tag == 'accessportV1':
index = self._get_int_attribute(accessport, 'index')
ap_address = APv1Address(index, ap_dp)
ap_address = APv1Address(index, ap_dp, apid)
# APv2
elif accessport.tag == 'accessportV2':
address = self._get_int_attribute(accessport, 'address')
ap_address = APv2Address(address, ap_dp)
ap_address = APv2Address(address, ap_dp, apid)
else:
raise exceptions.InternalError(
f"unexpected element <{accessport.tag}> in access ports list")

# Save this AP address and the specified __apid.
apid = self._get_int_attribute(accessport, '__apid')
# Save this AP address.
self._apids[apid] = ap_address
except MalformedCmsisPackError as err:
LOG.warning("%s", err)
Expand Down
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