cache cpu info in a file at boot

Android.bp

@@ -0,0 +1,134 @@
+// Copyright (C) 2020 The Android Open Source Project
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//      http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+package {
+    default_applicable_licenses: ["external_cpuinfo_license"],
+}
+
+// Added automatically by a large-scale-change
+// See: http://go/android-license-faq
+license {
+    name: "external_cpuinfo_license",
+    visibility: [":__subpackages__"],
+    license_kinds: [
+        "SPDX-license-identifier-BSD",
+    ],
+    license_text: [
+        "LICENSE",
+    ],
+}
+
+cpuinfo_arm_common_src_files = [
+    "src/arm/uarch.c",
+    "src/arm/cache.c",
+    "src/arm/linux/init.c",
+    "src/arm/linux/cpuinfo.c",
+    "src/arm/linux/clusters.c",
+    "src/arm/linux/chipset.c",
+    "src/arm/linux/midr.c",
+    "src/arm/linux/hwcap.c",
+    "src/arm/android/properties.c",
+]
+
+cpuinfo_x86_common_src_files = [
+    "src/x86/init.c",
+    "src/x86/info.c",
+    "src/x86/name.c",
+    "src/x86/isa.c",
+    "src/x86/vendor.c",
+    "src/x86/uarch.c",
+    "src/x86/topology.c",
+    "src/x86/cache/init.c",
+    "src/x86/cache/descriptor.c",
+    "src/x86/cache/deterministic.c",
+    "src/x86/linux/cpuinfo.c",
+    "src/x86/linux/init.c",
+]
+
+cc_library {
+    name: "libcpuinfo",
+    export_include_dirs: ["include"],
+    host_supported: true,
+    vendor_available: true,
+    product_available: true,
+    min_sdk_version: "29",
+    sdk_version: "current",
+    local_include_dirs: [
+        "src",
+        "include",
+    ],
+    srcs: [
+        "src/init.c",
+        "src/api.c",
+        "src/cache.c",
+        "src/log.c",
+        "src/linux/processors.c",
+        "src/linux/smallfile.c",
+        "src/linux/multiline.c",
+        "src/linux/cpulist.c",
+    ],
+    arch: {
+        arm: {
+            srcs: cpuinfo_arm_common_src_files + [
+                "src/arm/linux/aarch32-isa.c",
+            ],
+       },
+        arm64: {
+            srcs: cpuinfo_arm_common_src_files + [
+                "src/arm/linux/aarch64-isa.c",
+            ],
+        },
+        riscv64: {
+            srcs: [
+                "src/riscv/linux/init.c",
+                "src/riscv/linux/riscv-hw.c",
+                "src/riscv/linux/riscv-isa.c",
+                "src/riscv/uarch.c",
+            ],
+        },
+        x86: {
+            srcs: cpuinfo_x86_common_src_files,
+        },
+        x86_64: {
+            srcs: cpuinfo_x86_common_src_files,
+        },
+    },
+    cflags: [
+        "-std=c99",
+        "-Oz",
+        "-D_GNU_SOURCE=1",
+        "-DCPUINFO_LOG_LEVEL=2",
+        "-Wno-unused-function",
+        "-Wno-unused-parameter",
+        "-Wno-missing-field-initializers",
+        // __riscv_hwprobe() changed from unsigned long* to cpu_set_t*,
+        // but upstream hasn't updated yet.
+        "-Wno-incompatible-pointer-types",
+    ],
+    product_variables: {
+        debuggable: {
+            cflags: [
+                "-DDEBUG_CPUINFO",
+            ],
+        },
+    },
+    shared_libs: [
+        "liblog",
+        "libclog",
+    ],
+    apex_available: [
+        "//apex_available:platform",
+        "//apex_available:anyapex",
+    ],
+}

include/cpuinfo.h

@@ -890,10 +890,122 @@ struct cpuinfo_x86_isa {
 	bool phe;
 	bool pmm;
 	bool lwp;
+	bool erms;
+	bool smap;
+	bool serialize;
 };
 
 extern struct cpuinfo_x86_isa cpuinfo_isa;
+
+struct cpuid_regs {
+	uint32_t eax;
+	uint32_t ebx;
+	uint32_t ecx;
+	uint32_t edx;
+};
+
+struct cpuinfo_x86_cache {
+	uint32_t size;
+	uint32_t associativity;
+	uint32_t sets;
+	uint32_t partitions;
+	uint32_t line_size;
+	uint32_t flags;
+	uint32_t apic_bits;
+};
+
+struct cpuinfo_x86_caches {
+	struct cpuinfo_trace_cache trace;
+	struct cpuinfo_x86_cache l1i;
+	struct cpuinfo_x86_cache l1d;
+	struct cpuinfo_x86_cache l2;
+	struct cpuinfo_x86_cache l3;
+	struct cpuinfo_x86_cache l4;
+	uint32_t prefetch_size;
+};
+
+struct cpuinfo_x86_tlbs {
+	struct cpuinfo_tlb itlb_4KB;
+	struct cpuinfo_tlb itlb_2MB;
+	struct cpuinfo_tlb itlb_4MB;
+	struct cpuinfo_tlb dtlb0_4KB;
+	struct cpuinfo_tlb dtlb0_2MB;
+	struct cpuinfo_tlb dtlb0_4MB;
+	struct cpuinfo_tlb dtlb_4KB;
+	struct cpuinfo_tlb dtlb_2MB;
+	struct cpuinfo_tlb dtlb_4MB;
+	struct cpuinfo_tlb dtlb_1GB;
+	struct cpuinfo_tlb stlb2_4KB;
+	struct cpuinfo_tlb stlb2_2MB;
+	struct cpuinfo_tlb stlb2_1GB;
+};
+
+struct cpuinfo_x86_model_info {
+	uint32_t model;
+	uint32_t family;
+	uint32_t base_model;
+	uint32_t base_family;
+	uint32_t stepping;
+	uint32_t extended_model;
+	uint32_t extended_family;
+	uint32_t processor_type;
+};
+
+struct cpuinfo_x86_topology {
+	uint32_t apic_id;
+	uint32_t thread_bits_offset;
+	uint32_t thread_bits_length;
+	uint32_t core_bits_offset;
+	uint32_t core_bits_length;
+};
+
+struct cpuinfo_x86_processor {
+	uint32_t cpuid;
+	enum cpuinfo_vendor vendor;
+	enum cpuinfo_uarch uarch;
+#ifdef __linux__
+	int linux_id;
+#endif
+	struct cpuinfo_x86_caches cache;
+	struct cpuinfo_x86_tlbs tlb;
+	struct cpuinfo_x86_topology topology;
+	char brand_string[CPUINFO_PACKAGE_NAME_MAX];
+};
+
+#ifdef __ANDROID__
+static const char CPUID_INFO_FILE[] = "/data/vendor/cpuinfo/cpuid.info";
+
+struct cpuinfo_x86_cpuid_info {
+	struct cpuinfo_x86_isa isa;
+	struct cpuinfo_x86_model_info model;
+	struct cpuinfo_x86_processor processor;
+};
+#endif //__ANDROID__
+#endif //CPUINFO_ARCH_X86 || CPUINFO_ARCH_X86_64
+
+static inline bool cpuinfo_has_x86_erms(void) {
+#if CPUINFO_ARCH_X86 || CPUINFO_ARCH_X86_64
+	return cpuinfo_isa.erms;
+#else
+	return false;
 #endif
+}
+
+static inline bool cpuinfo_has_x86_smap(void) {
+#if CPUINFO_ARCH_X86 || CPUINFO_ARCH_X86_64
+	return cpuinfo_isa.smap;
+#else
+	return false;
+#endif
+}
+
+static inline bool cpuinfo_has_x86_serialize(void) {
+#if CPUINFO_ARCH_X86 || CPUINFO_ARCH_X86_64
+	return cpuinfo_isa.serialize;
+#else
+	return false;
+#endif
+}
 
 static inline bool cpuinfo_has_x86_rdtsc(void) {
 #if CPUINFO_ARCH_X86_64

src/cpuinfo/log.h

@@ -15,6 +15,11 @@
 #define CPUINFO_LOG_INFO 4
 #define CPUINFO_LOG_DEBUG 5
 
+#ifdef DEBUG_CPUINFO
+#undef CPUINFO_LOG_LEVEL
+#define CPUINFO_LOG_LEVEL CPUINFO_LOG_DEBUG
+#endif
+
 #ifndef CPUINFO_LOG_DEBUG_PARSERS
 #define CPUINFO_LOG_DEBUG_PARSERS 0
 #endif

src/x86/api.h

@@ -6,80 +6,6 @@
 #include <cpuinfo.h>
 #include <cpuinfo/common.h>
 
-struct cpuid_regs {
-	uint32_t eax;
-	uint32_t ebx;
-	uint32_t ecx;
-	uint32_t edx;
-};
-
-struct cpuinfo_x86_cache {
-	uint32_t size;
-	uint32_t associativity;
-	uint32_t sets;
-	uint32_t partitions;
-	uint32_t line_size;
-	uint32_t flags;
-	uint32_t apic_bits;
-};
-
-struct cpuinfo_x86_caches {
-	struct cpuinfo_trace_cache trace;
-	struct cpuinfo_x86_cache l1i;
-	struct cpuinfo_x86_cache l1d;
-	struct cpuinfo_x86_cache l2;
-	struct cpuinfo_x86_cache l3;
-	struct cpuinfo_x86_cache l4;
-	uint32_t prefetch_size;
-};
-
-struct cpuinfo_x86_model_info {
-	uint32_t model;
-	uint32_t family;
-
-	uint32_t base_model;
-	uint32_t base_family;
-	uint32_t stepping;
-	uint32_t extended_model;
-	uint32_t extended_family;
-	uint32_t processor_type;
-};
-
-struct cpuinfo_x86_topology {
-	uint32_t apic_id;
-	uint32_t thread_bits_offset;
-	uint32_t thread_bits_length;
-	uint32_t core_bits_offset;
-	uint32_t core_bits_length;
-};
-
-struct cpuinfo_x86_processor {
-	uint32_t cpuid;
-	enum cpuinfo_vendor vendor;
-	enum cpuinfo_uarch uarch;
-#ifdef __linux__
-	int linux_id;
-#endif
-	struct cpuinfo_x86_caches cache;
-	struct {
-		struct cpuinfo_tlb itlb_4KB;
-		struct cpuinfo_tlb itlb_2MB;
-		struct cpuinfo_tlb itlb_4MB;
-		struct cpuinfo_tlb dtlb0_4KB;
-		struct cpuinfo_tlb dtlb0_2MB;
-		struct cpuinfo_tlb dtlb0_4MB;
-		struct cpuinfo_tlb dtlb_4KB;
-		struct cpuinfo_tlb dtlb_2MB;
-		struct cpuinfo_tlb dtlb_4MB;
-		struct cpuinfo_tlb dtlb_1GB;
-		struct cpuinfo_tlb stlb2_4KB;
-		struct cpuinfo_tlb stlb2_2MB;
-		struct cpuinfo_tlb stlb2_1GB;
-	} tlb;
-	struct cpuinfo_x86_topology topology;
-	char brand_string[CPUINFO_PACKAGE_NAME_MAX];
-};
-
 CPUINFO_INTERNAL void cpuinfo_x86_init_processor(struct cpuinfo_x86_processor* processor);
 
 CPUINFO_INTERNAL enum cpuinfo_vendor cpuinfo_x86_decode_vendor(uint32_t ebx, uint32_t ecx, uint32_t edx);