10-bit CPU & Assembler

This is an HTML/Javascript CPU simulator and assembler for the CPU I designed. Originally, I created this CPU on paper many years ago for a homework assignment in college. More recently, I implemented my design in the Logisim logic simulator, and eventually it ran on an FPGA.

A small and simple 8-bit CPU built in Logisim. The project also includes an assembler and a manual for those who want to learn how a processor works.

CPU Simulation with Logisim for Computer Architecture Course

LSC-8 - LogiSim Computer with 8-bit CPU

A (very) simple 32-bit RISCV processor with a loaded Pong game to show it off

14-bit CPU implementation in Logisim. This is a 14-bit RISC CPU logisim implementation. All files are included in this single repository.

Basing on logisim, the design of cpu with pipeline.

The Logisim circuits to pass the Computer Organization course design of HUST.

A 16-Bit computer(C.I.S.C) with 38 Instructions, 2 addressing modes and a register stack.

A RISC Processor with a 5 stage pipeline and 32-bit instruction set.

These are various files pertaining to a CPU I designed. Can be used in conjunction with my Logisim CPU youtube video series.

Logisim implementation of a 16-bit single cycle and pipelined RISC processor designed from an instruction set.

Emulación de procesador MIPS utilizando Logisim

An 8-bit CPU designed for Minecraft.

Simple RISC CPU implementation in Logisim.

ORT2 project repository.

Simple (glitchy) 16-bit cpu (made with logisim-evolution)

Compilers, data sheets, resources and .circ files for my 8-Bit CPU (Rouvik CPU - II)