feat(cuda): add resilient native and grouped GEMM dispatch - #1440
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ppodolsky wants to merge 8 commits into
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feat(cuda): add resilient native and grouped GEMM dispatch#1440ppodolsky wants to merge 8 commits into
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This was referenced Jul 18, 2026
This was referenced Jul 18, 2026
ppodolsky
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Agreed that grouped GEMM is a gap in the cubecl/cubek/burn stack. That said, our goal is to avoid depending on pre-built binaries like cuBLAS wherever we can. To that end, we're working on a tile API that should simplify cross-platform compatibility, cover all dtypes including quantized tensors, and compose with Burn's automatic fusion (both on-read and on-write). We're happy to keep this PR around as a baseline to benchmark other implementations against, but we're trying hard to avoid the combinatorial explosion of kernels per platform × dtype × fusion group. |
cublasGemmEx with CUBLAS_GEMM_DEFAULT_TENSOR_OP leaves algorithm selection to the legacy heuristic. cublasLt exposes the real heuristic API, so each GEMM shape now gets a cached execution plan (descriptor, layouts, and the heuristic-selected algorithm) plus a 32 MiB workspace so split-K algorithms are eligible - the same machinery PyTorch's linear uses. Workspaces are per CUDA stream since concurrent matmuls must not share scratch. Shapes the heuristic rejects surface as validation errors, which the autotune arbitration already treats as candidate unavailable.
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Summary
This PR adds resilient native GEMM paths to CubeCL's CUDA runtime:
BufferTooBigcublasGemmGroupedBatchedExon CUDA 12.5+The allocation retry was previously proposed separately in #1438. It is consolidated here so the CUDA accelerator integration has one review thread.
Behavior and compatibility
Both GEMM primitives are optional runtime capabilities. Their server trait methods have default fail-loud implementations, so other backends require no changes. Callers can independently inspect
features.matmul.accelerated_gemmandfeatures.matmul.accelerated_grouped_gemmbefore dispatch.CUDA advertises single BF16 GEMM only on SM80+. Grouped BF16 GEMM additionally requires CUDA 12.5. The grouped descriptor supports independent M, N, K, transpose state, and binding offsets per problem. Host metadata uses a bounded pinned staging ring guarded by CUDA events, so repeated and multi-stream launches remain asynchronous without overwriting in-flight arguments.
The allocator cleanup path runs only after storage reports
BufferTooBig. It rechecks the selected pool after cleanup before attempting one new device allocation.Dependency validation
mainis the direct base of this branch.tracel-ai/*repositories.Validation
cargo fmt --all -- --checkcargo check -p cubecl-runtimecargo check -p cubecl-cuda --examplesdx/dW/dbparity under fusion, autotune, and autodiffPerformance
On an A100-SXM4 40GB, BF16 native single-GEMM dispatch beat or matched PyTorch matmul on 14 of 17 transformer-training shapes. A heterogeneous grouped expert projection measured 0.290 ms versus 0.438 ms for the prior padded batched path; activation time is excluded from both measurements.