Popular repositories Loading

1. SENIOR-PROJECT SENIOR-PROJECT Public

   Spiked Neural Network with VLSI implementation

   SystemVerilog 1 1

2. EE531 EE531 Public

   Advanced VLSI Design at Cal Poly. Projects from this class with both Vivado design for HDL parts, and post-librelane tool MAGIC layouts/metrics.

   SystemVerilog 1

3. CPE233 CPE233 Public

   Final Project for CPE-233 at Cal Poly. Uses Risc-V ISA on a 32 bit MCU designed for Basys-3 Artix-7 FPGA breakout. MCU specifically used for I2C read/write and stepper motor control

   SystemVerilog

4. EE261 EE261 Public

   Intro to programing in C with Hardware at Cal Poly.

   C

5. EE329 EE329 Public

   Microcontroller Based Systems Design at Cal Poly SLO

   C

6. EE431 EE431 Public

   CAD of VLSI Devices at Cal Poly SLO

   Tcl