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HwAccel & Getting Started: updates to Makefiles to support HW builds …
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…and runs

* updated setup instructions

* Update Part4-embedded_platform.md

* updated xrt.ini 

to add native_xrt_trace=true

* created test list

* updated with "select case"

/group/xcoswmktg/randyh/sprite-test-list.txt

* Delete randy_techdocs_json_randyh_Vitis-Tutorials.list

* Updated host.cpp

to support hw build on zcu104

* edited to remove source files

which are causing a Makefile error

* changed -lpthread to -pthread

* updated platform for 2022.1

changed to xilinx_u200_gen3x16_xdma_2_202110_1

* imported Uday's changes 

from GitHub PR#185

and updated xrt.ini options for 2022.1

* resolved g++ command issues

though $XILINX_VIVADO/include does not appear necessary...maybe remove later
and also removed the platform_desc.txt file
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Randy Hartgrove authored and GitHub Enterprise committed Mar 10, 2022
1 parent efbda25 commit cd149e2
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Showing 54 changed files with 499 additions and 271 deletions.
7 changes: 3 additions & 4 deletions Getting_Started/Vitis/Part4-embedded_platform.md
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Expand Up @@ -29,7 +29,7 @@

### Setting up the environment

> IMPORTANT: This tutorial requires Vitis 2021.1 or later to run.
> IMPORTANT: This tutorial requires Vitis 2022.1 or later to run.
*NOTE: The instructions provided below assume that you are running in a bash shell.*

Expand All @@ -48,11 +48,10 @@ export PLATFORM_REPO_PATHS=<path to the ZCU102 platform install dir>
export ROOTFS=<path to the ZYNQMP common image directory, containing rootfs>
```

* To properly source the cross-compilation SDK, run the `environment-setup-aarch64-xilinx-linux` script in the directory
where you extracted the SDK source.
* To properly source the cross-compilation SDK, run the `environment-setup-cortexa72-cortexa53-xilinx-linux` script in the $ROOTFS directory.

```bash
source <path to the SDK>/environment-setup-aarch64-xilinx-linux
source $ROOTFS/environment-setup-cortexa72-cortexa53-xilinx-linux
```

*NOTE: The ZYNQMP common image file can be downloaded from the [Vitis Embedded Platforms](https://www.xilinx.com/support/download/index.html/content/xilinx/en/downloadNav/embedded-platforms.html) page, and contains the Sysroot, Rootfs, and boot Image for Xilinx Zynq MPSoC devices.*
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2 changes: 1 addition & 1 deletion Getting_Started/Vitis/example/src/host.cpp
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Expand Up @@ -67,7 +67,7 @@ int main(int argc, char **argv)
// Create the buffers and allocate memory
cl::Buffer in1_buf(context, CL_MEM_READ_ONLY, sizeof(int) * DATA_SIZE, NULL, &err);
cl::Buffer in2_buf(context, CL_MEM_READ_ONLY, sizeof(int) * DATA_SIZE, NULL, &err);
cl::Buffer out_buf(context, CL_MEM_WRITE_ONLY, sizeof(int) * DATA_SIZE, NULL, &err);
cl::Buffer out_buf(context, CL_MEM_READ_WRITE, sizeof(int) * DATA_SIZE, NULL, &err);

// Map buffers to kernel arguments, thereby assigning them to specific device memory banks
krnl_vector_add.setArg(0, in1_buf);
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12 changes: 6 additions & 6 deletions Getting_Started/Vitis/example/u200/Makefile
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@@ -1,7 +1,7 @@
XF_PROJ_ROOT ?= $(shell bash -c 'export MK_PATH=$(MK_PATH); echo $${MK_PATH%/Getting_Started/Vitis/example/src/*}')

TARGET := hw_emu
PLATFORM := xilinx_u200_gen3x16_xdma_1_202110_1
PLATFORM := xilinx_u200_gen3x16_xdma_2_202110_1
SRCDIR := $(XF_PROJ_ROOT)/Getting_Started/Vitis/example/src
BUILD_DIR := $(TARGET)

Expand All @@ -14,18 +14,18 @@ else
cd $(BUILD_DIR) && XCL_EMULATION_MODE=$(TARGET) ./app.exe
endif

#build: host emconfig xclbin
build: $(BUILD_DIR)/app.exe $(BUILD_DIR)/emconfig.json $(BUILD_DIR)/vadd.xclbin
build: host emconfig xclbin
#build: $(BUILD_DIR)/app.exe $(BUILD_DIR)/emconfig.json $(BUILD_DIR)/vadd.xclbin

host: $(BUILD_DIR)/app.exe
$(BUILD_DIR)/app.exe: $(SRCDIR)/host.cpp
$(BUILD_DIR)/app.exe:
mkdir -p $(BUILD_DIR)
g++ -Wall -g -std=c++11 $(SRCDIR)/host.cpp -o $(BUILD_DIR)/app.exe \
-I${XILINX_XRT}/include/ \
-L${XILINX_XRT}/lib/ -lOpenCL -lpthread -lrt -lstdc++
-L${XILINX_XRT}/lib/ -lOpenCL -pthread -lrt -lstdc++

xo: $(BUILD_DIR)/vadd.xo
$(BUILD_DIR)/vadd.xo: $(SRCDIR)/vadd.cpp
$(BUILD_DIR)/vadd.xo:
v++ -c -t ${TARGET} --platform $(PLATFORM) --config $(SRCDIR)/u200.cfg -k vadd -I$(SRCDIR) $(SRCDIR)/vadd.cpp -o $(BUILD_DIR)/vadd.xo

xclbin: $(BUILD_DIR)/vadd.xclbin
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2 changes: 1 addition & 1 deletion Getting_Started/Vitis/example/u200/description.json
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Expand Up @@ -3,7 +3,7 @@
"description": "getting-started-with-vitis",
"flow": "vitis",

"platform_whitelist": ["u200"],
"platform_allowlist": ["u200"],

"testinfo": {
"jobs": [
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15 changes: 8 additions & 7 deletions Getting_Started/Vitis/example/zcu102/Makefile
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@@ -1,13 +1,13 @@
ndef = $(if $(value $(1)),,$(error $(1) must be set prior to running))

XF_PROJ_ROOT ?= $(shell bash -c 'export MK_PATH=$(MK_PATH); echo $${MK_PATH%/Getting_Started/Vitis/example/src/*}')
CXX := $(XILINX_VITIS)/gnu/aarch64/lin/aarch64-linux/bin/aarch64-linux-gnu-g++

TARGET := hw_emu
PLATFORM := xilinx_zcu102_base_202120_1
PLATFORM := xilinx_zcu102_base_202210_1
SRCDIR := $(XF_PROJ_ROOT)/Getting_Started/Vitis/example/src
BUILD_DIR := $(TARGET)
EMBEDDED_EXEC_SCRIPT := run_$(TARGET).sh
EMBEDDED_PACKAGE_OUT := $(BUILD_DIR)package/sd_card.img
SDKTARGETSYSROOT := $(SYSROOT)
ROOTFS ?= $(EDGE_COMMON_SW)

Expand All @@ -20,18 +20,19 @@ else
cd $(BUILD_DIR)/package && launch_$(TARGET).sh -no-reboot -run-app $(EMBEDDED_EXEC_SCRIPT)
endif

#build: host emconfig xclbin
build: $(BUILD_DIR)/app.exe $(BUILD_DIR)/vadd.xclbin $(BUILD_DIR)/package/sd_card.img
build: host xclbin package
#build: $(BUILD_DIR)/app.exe $(BUILD_DIR)/vadd.xclbin $(BUILD_DIR)/package/sd_card.img

host: $(BUILD_DIR)/app.exe
$(BUILD_DIR)/app.exe:
$(call ndef,SDKTARGETSYSROOT)
mkdir -p $(BUILD_DIR)
cp xrt.ini $(BUILD_DIR)
cp run_$(TARGET).sh $(BUILD_DIR)
$(CXX) -Wall -g -std=c++11 $(SRCDIR)/host.cpp -o $(BUILD_DIR)/app.exe \
-I/usr/include/xrt \
-lOpenCL -lpthread -lrt -lstdc++
$(CXX) $(SRCDIR)/host.cpp -o $(BUILD_DIR)/app.exe -Wall -O0 -g -std=c++1y -fmessage-length=0 \
-I$(SDKTARGETSYSROOT)/usr/include/xrt -L$(SDKTARGETSYSROOT)/usr/lib \
-I$XILINX_VIVADO/include \
-lOpenCL -pthread -lrt -lstdc++ --sysroot=$(SDKTARGETSYSROOT)

xo: $(BUILD_DIR)/vadd.xo
$(BUILD_DIR)/vadd.xo:
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2 changes: 1 addition & 1 deletion Getting_Started/Vitis/example/zcu102/description.json
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Expand Up @@ -3,7 +3,7 @@
"description": "getting-started-with-vitis",
"flow": "vitis",

"platform_whitelist": ["zcu102"],
"platform_allowlist": ["zcu102"],

"testinfo": {
"disable": 0,
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2 changes: 0 additions & 2 deletions Getting_Started/Vitis/example/zcu102/run_hw.sh
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Expand Up @@ -8,8 +8,6 @@
mount /dev/mmcblk0p1 /mnt
cd /mnt

cp platform_desc.txt /etc/xocl.txt

export XILINX_XRT=/usr
export XILINX_VITIS=/mnt

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2 changes: 0 additions & 2 deletions Getting_Started/Vitis/example/zcu102/run_hw_emu.sh
Original file line number Diff line number Diff line change
Expand Up @@ -7,8 +7,6 @@
mount /dev/mmcblk0p1 /mnt
cd /mnt

cp platform_desc.txt /etc/xocl.txt

export XILINX_XRT=/usr
export XILINX_VITIS=/mnt
export XCL_EMULATION_MODE=hw_emu
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2 changes: 0 additions & 2 deletions Getting_Started/Vitis/example/zcu102/run_sw_emu.sh
Original file line number Diff line number Diff line change
Expand Up @@ -7,8 +7,6 @@
mount /dev/mmcblk0p1 /mnt
cd /mnt

cp platform_desc.txt /etc/xocl.txt

export XILINX_XRT=/usr
export XILINX_VITIS=/mnt
export XCL_EMULATION_MODE=sw_emu
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4 changes: 2 additions & 2 deletions Getting_Started/Vitis_HLS/reference-files/Makefile
Original file line number Diff line number Diff line change
Expand Up @@ -19,13 +19,13 @@ help:
@echo ""
#######################################################################################
TARGET := sw_emu
PLATFORM := xilinx_u200_gen3x16_xdma_1_202110_1
PLATFORM := xilinx_u200_gen3x16_xdma_2_202110_1
HOST_EXE := dct_top
XO := dct.$(TARGET).$(PLATFORM).xo
XCLBIN := dct.$(TARGET).$(PLATFORM).xclbin

# Host building global settings
CXXFLAGS := -I$(XILINX_XRT)/include/ -I$(XILINX_VIVADO)/include/ -Wall -O0 -g -std=c++11 -L$(XILINX_XRT)/lib/ -lpthread -lrt -lstdc++
CXXFLAGS := -I$(XILINX_XRT)/include/ -I$(XILINX_VIVADO)/include/ -Wall -O0 -g -std=c++11 -L$(XILINX_XRT)/lib/ -pthread -lrt -lstdc++
CXXFLAGS2 := -lOpenCL

# Kernel compiler & linker global settings
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4 changes: 2 additions & 2 deletions Getting_Started/Vitis_HLS/reference-files/description.json
Original file line number Diff line number Diff line change
Expand Up @@ -3,8 +3,8 @@
"description": "Getting Started with Vitis HLS",
"flow": "vitis",

"platform_whitelist": ["u200"],
"platform_blacklist": ["u280"],
"platform_allowlist": ["u200"],
"platform_blocklist": ["u280"],

"testinfo": {
"jobs": [
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -103,7 +103,7 @@ CXXLDFLAGS := -L$(XILINX_XRT)/lib/
ifneq ($(INPUT_TYPE),random)
CXXLDFLAGS += -L$(OPENCV_LIB)/
endif
CXXLDFLAGS += -lOpenCL -lpthread -lrt -lstdc++ -lxilinxopencl -fopenmp
CXXLDFLAGS += -lOpenCL -pthread -lrt -lstdc++ -lxilinxopencl -fopenmp
ifneq ($(INPUT_TYPE),random)
CXXLDFLAGS += -Wl,-rpath=$(OPENCV_LIB)/ -lopencv_core -lopencv_highgui
endif
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Original file line number Diff line number Diff line change
Expand Up @@ -3,7 +3,7 @@
"description": "01-convolution-tutorial",
"flow": "vitis",

"platform_whitelist": ["u200"],
"platform_allowlist": ["u200"],

"testinfo": {
"tasks": {
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -20,7 +20,7 @@ ifeq ($(STEP), kernel_16)
PF := 16
endif

PLATFORM :=xilinx_u200_gen3x16_xdma_1_202110_1
PLATFORM :=xilinx_u200_gen3x16_xdma_2_202110_1

#SRCDIR := ./../reference_files
ifeq ($(SPRITE),true)
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Original file line number Diff line number Diff line change
Expand Up @@ -54,7 +54,7 @@ host: $(SRCDIR)/*.cpp $(SRCDIR)/*.c $(SRCDIR)/*.h
-O3 -Wall -fmessage-length=0 -std=c++11\
$(HOST_SRC_CPP) \
-L$(XILINX_XRT)/lib/ \
-lxilinxopencl -lpthread -lrt \
-lxilinxopencl -pthread -lrt \
-o $(BUILDDIR)/host

emconfig.json:
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -3,7 +3,7 @@
"description": "02-bloom",
"flow": "vitis",

"platform_whitelist": ["u200"],
"platform_allowlist": ["u200"],

"testinfo": {
"jobs": [
Expand All @@ -23,7 +23,7 @@
"vitis_hw_build",
"vitis_hw_run"
],
"make_options" : [ "SPRITE='true'", "TARGET='$user_test_mode'", "XF_PROJ_ROOT='${GITHUB_LIBS_REPO}/Vitis-Tutorials'", "PLATFORM_REPO_PATHS='$PLATFORM_PATH'", "SpriteEn=1" ],
"make_options" : [ "SPRITE='true'", "TARGET='$user_test_mode'", "XF_PROJ_ROOT='${GITHUB_LIBS_REPO}/Vitis-Tutorials'", "PLATFORM_REPO_PATHS='$PLATFORM_PATH'", "SpriteEnable=1" ],
"category": "canary",
"custom_build_target": {
"all": "run",
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -4,19 +4,19 @@
"STEP": "split_buffer",
"ITER": "2",
"PF": "8",
"SpriteEn": "1"
"SpriteEnable": "1"
},
"sw_overlap": {
"STEP": "sw_overlap",
"ITER": "8",
"PF": "8",
"SpriteEn": "1"
"SpriteEnable": "1"
},
"multiDDR": {
"STEP": "multiDDR",
"ITER": "8",
"PF": "8",
"SpriteEn": "1"
"SpriteEnable": "1"
}
}
}
Original file line number Diff line number Diff line change
Expand Up @@ -33,9 +33,8 @@ help::
$(ECHO) "--------------------------------------------------------------------------------------------------------------------------------"
$(ECHO) ""
$(ECHO) "Supported Platform (platform_name):"
$(ECHO) " xilinx_u200_xdma_201830_2"
$(ECHO) " xilinx_u200_gen3x16_xdma_1_1_202020_1"
$(ECHO) " xilinx_u250_xdma_201830_2"
$(ECHO) " xilinx_u200_gen3x16_xdma_2_202110_1"
$(ECHO) " xilinx_u250_gen3x16_xdma_2_1_202010_1"
$(ECHO) " xilinx_u250_gen3x16_xdma_3_1_202020_1"
$(ECHO) " xilinx_u50_gen3x16_xdma_201920_3"
$(ECHO) " xilinx_u280_xdma_201920_3"
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -3,7 +3,7 @@
"description": "04-traveling-salesperson",
"flow": "hls",

"platform_whitelist": ["u200"],
"platform_allowlist": ["u200"],

"testinfo": {
"disable": 1,
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -35,7 +35,6 @@ help::

PLATFORM := xilinx_u50_gen3x16_xdma_201920_3


## TARGET can be set as:
## sw_emu: software emulation
## hw_emu: hardware Emulation
Expand Down Expand Up @@ -85,7 +84,7 @@ CXXFLAGS += -O2 -g -Wall -fmessage-length=0 -std=c++0x

CXXLDFLAGS := -L$(XILINX_XRT)/lib/
#CXXLDFLAGS += -lxilinxopencl -lpthread -lrt -lstdc++
CXXLDFLAGS += -lOpenCL -lpthread -lrt -lstdc++
CXXLDFLAGS += -lOpenCL -pthread -lrt -lstdc++

## Kernel Compiler and Linker Flags

Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -3,7 +3,7 @@
"description": "06-cholesky-accel-module1",
"flow": "vitis",

"platform_whitelist": ["u50"],
"platform_allowlist": ["u50"],

"testinfo": {
"jobs": [
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -85,7 +85,7 @@ CXXFLAGS += -O2 -g -Wall -fmessage-length=0 -std=c++0x

CXXLDFLAGS := -L$(XILINX_XRT)/lib/
#CXXLDFLAGS += -lxilinxopencl -lpthread -lrt -lstdc++
CXXLDFLAGS += -lOpenCL -lpthread -lrt -lstdc++
CXXLDFLAGS += -lOpenCL -pthread -lrt -lstdc++

## Kernel Compiler and Linker Flags

Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -3,7 +3,7 @@
"description": "06-cholesky-accel-module2",
"flow": "vitis",

"platform_whitelist": ["u50"],
"platform_allowlist": ["u50"],

"testinfo": {
"jobs": [
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -85,7 +85,7 @@ CXXFLAGS += -O2 -g -Wall -fmessage-length=0 -std=c++0x

CXXLDFLAGS := -L$(XILINX_XRT)/lib/
#CXXLDFLAGS += -lxilinxopencl -lpthread -lrt -lstdc++
CXXLDFLAGS += -lOpenCL -lpthread -lrt -lstdc++
CXXLDFLAGS += -lOpenCL -pthread -lrt -lstdc++

## Kernel Compiler and Linker Flags

Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -3,7 +3,7 @@
"description": "06-cholesky-accel-module3",
"flow": "vitis",

"platform_whitelist": ["u50"],
"platform_allowlist": ["u50"],

"testinfo": {
"jobs": [
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -85,7 +85,7 @@ CXXFLAGS += -O2 -g -Wall -fmessage-length=0 -std=c++0x

CXXLDFLAGS := -L$(XILINX_XRT)/lib/
#CXXLDFLAGS += -lxilinxopencl -lpthread -lrt -lstdc++
CXXLDFLAGS += -lOpenCL -lpthread -lrt -lstdc++
CXXLDFLAGS += -lOpenCL -pthread -lrt -lstdc++

## Kernel Compiler and Linker Flags

Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -3,7 +3,7 @@
"description": "06-cholesky-accel-module4",
"flow": "vitis",

"platform_whitelist": ["u50"],
"platform_allowlist": ["u50"],

"testinfo": {
"jobs": [
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -11,9 +11,7 @@ SIZE := 14
TARGET := hw_emu
#TARGETS := hw_emu
#TARGET := $(TARGETS)
DEVICE := xilinx_u200_gen3x16_xdma_1_202110_1
#DEVICES := xilinx_u200_gen3x16_xdma_1_202110_1
#DEVICE := $(DEVICES)
DEVICE := xilinx_u200_gen3x16_xdma_2_202110_1
LAB := pipeline
#BUILDIR := $(LAB)
XCLBIN := ./xclbin
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -3,7 +3,7 @@
"description": "07-host-code-opt",
"flow": "vitis",

"platform_whitelist": ["u200"],
"platform_allowlist": ["u200"],

"testinfo": {
"jobs": [
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -26,7 +26,7 @@ ABS_COMMON_REPO = $(shell readlink -f $(COMMON_REPO))
HOST := user
TARGET := hw_emu
#TARGET := $(TARGETS)
DEVICE := xilinx_u200_gen3x16_xdma_1_202110_1
DEVICE := xilinx_u200_gen3x16_xdma_2_202110_1
XCLBIN := ./xclbin
XO := ./xo

Expand All @@ -51,8 +51,8 @@ ECHO:= @echo
######################################################################
host_CXXFLAGS += -g -I./ -I$(XILINX_XRT)/include -I$(XILINX_VIVADO)/include -Wall -O0 -g -std=c++1y
# The below are linking flags for C++ Comnpiler
opencl_LDFLAGS += -L$(XILINX_XRT)/lib -lOpenCL -lpthread
xrt_LDFLAGS += -L$(XILINX_XRT)/lib -lxrt_coreutil -lpthread
opencl_LDFLAGS += -L$(XILINX_XRT)/lib -lOpenCL -pthread
xrt_LDFLAGS += -L$(XILINX_XRT)/lib -lxrt_coreutil -pthread

CXXFLAGS += $(host_CXXFLAGS)

Expand Down
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