use uncached ranges for esp32p4 #29
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bugadani
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Nov 22, 2025
ld/esp32p4.x
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| /* Start 64k into the uncached RAM region */ | ||
| IRAM : ORIGIN = 0x8FF30000, LENGTH = 0x10000 |
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Can you push this over to 0x8FF50000 instead? ROM code in older devices use RAM up until 0x4ff40000, and probe-rs places breakpoints before the algo. Besides, the 64k in the comment is wrong, although that's not a big deal.
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I moved it to 0x8ff40020, which works.
bugadani
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src/main.rs
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| // ESP32-C61 | 0x4081_0000 | 0x4081_0000 | 0x4082_0000 | 0x4083_0000 | 0x4083_8000 !! ROM data use starts at 0x4083EA70, so let's use H2's memory layout | ||
| // ESP32-H2 | 0x4081_0000 | 0x4081_0000 | 0x4082_0000 | 0x4083_0000 | 0x4083_8000 !! has smaller RAM, only reserve 32K for data | ||
| // ESP32-P4 | 0x4FF1_0000 | 0x4FF1_0000 | 0x4FF6_0000 | 0x4FF7_0000 | 0x4FFC_0000 | ||
| // ESP32-P4 | 0x8FF3_0000 | 0x8FF3_0000 | 0x8FF6_0000 | 0x8FF7_0000 | 0x8FFC_0000 !! Uncached region |
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| // ESP32-P4 | 0x8FF3_0000 | 0x8FF3_0000 | 0x8FF6_0000 | 0x8FF7_0000 | 0x8FFC_0000 !! Uncached region | |
| // ESP32-P4 | 0x8FF3_0000 | 0x8FF3_0000 | 0x8FF6_0000 | 0x8FF7_0000 | 0x8FF8_0000 !! Uncached region |
This doesn't really change anything, but because ROM functions in newer chips use the end of RAM, let's shrink our documented range a bit :)
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This moves the flash algorithm into uncached ranges as required for version 3.0 of the chip.
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This moves the flash algorithm into uncached ranges as required for version 3.0 of the chip.