[AMDGPU] Fix a crash when a bool variable is used in inline asm

[shiltian]

Fixes SWDEV-570184.

[shiltian]

• [AMDGPU] Fix a crash when a bool variable is used in inline asm #171004 👈 (View in Graphite)
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[llvmbot]

@llvm/pr-subscribers-backend-amdgpu

Author: Shilei Tian (shiltian)

Changes

---

Full diff: https://github.com/llvm/llvm-project/pull/171004.diff

2 Files Affected:

• (modified) llvm/lib/Target/AMDGPU/SIISelLowering.cpp (+5)
• (added) llvm/test/CodeGen/AMDGPU/inline-asm-use-bool.ll (+15)

diff --git a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
index ff67fd63ea75e..b5e6db178022c 100644
--- a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
@@ -17670,6 +17670,11 @@ SITargetLowering::getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI_,
       break;
     case 'v':
       switch (BitWidth) {
+      case 1:
+        RC = Subtarget->has1024AddressableVGPRs()
+                 ? &AMDGPU::VGPR_32_Lo256RegClass
+                 : &AMDGPU::VGPR_32RegClass;
+        break;
       case 16:
         RC = Subtarget->useRealTrue16Insts() ? &AMDGPU::VGPR_16RegClass
                                              : &AMDGPU::VGPR_32_Lo256RegClass;
diff --git a/llvm/test/CodeGen/AMDGPU/inline-asm-use-bool.ll b/llvm/test/CodeGen/AMDGPU/inline-asm-use-bool.ll
new file mode 100644
index 0000000000000..f26032656a2e9
--- /dev/null
+++ b/llvm/test/CodeGen/AMDGPU/inline-asm-use-bool.ll
@@ -0,0 +1,15 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
+; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx942 %s -o - | FileCheck %s
+; RUN: llc -global-isel=1 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx942 %s -o - | FileCheck %s
+
+define void @test(ptr %p, i1 %b) {
+; CHECK-LABEL: test:
+; CHECK:       ; %bb.0:
+; CHECK-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; CHECK-NEXT:    ;;#ASMSTART
+; CHECK-NEXT:    global_store_byte v[0:1], v2, off glc slc
+; CHECK-NEXT:    ;;#ASMEND
+; CHECK-NEXT:    s_setpc_b64 s[30:31]
+  tail call void asm sideeffect "global_store_byte $0, $1, off glc slc", "v,v"(ptr %p, i1 %b)
+  ret void
+}

[arsenm]

This case should be an error. We should interpret i1 as a lanemask SGPR

[shiltian]

This was called in SelectionDAGBuilder::visitInlineAsm so I'm not sure if we can do anything at that moment. We can definitely do something later in the pipeline.