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  • Add HAL FSP XSPI_QSPI files to support Flash driver for RZ/T, N series
  • Add HAL FSP SPIBSC files to support Flash driver for RZ/A series

@KhiemNguyenT
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@quytranpzz please take a look.

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@binhnguyen2434 binhnguyen2434 left a comment

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LGTM

Comment on lines 100 to 105
if(CONFIG_DT_HAS_RENESAS_RZ_QSPI_SPIBSC_ENABLED)
zephyr_library_sources_ifdef(CONFIG_USE_RZ_FSP_QSPI
fsp/src/${SOC_SERIES_PREFIX}/r_spibsc/r_spibsc.c)
else()
zephyr_library_sources_ifdef(CONFIG_USE_RZ_FSP_QSPI
fsp/src/${SOC_SERIES_PREFIX}/r_xspi_qspi/r_xspi_qspi.c)
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I have a question,
Why don't we add 2 configs for 2 sources? , like config USE_RZ_FSP_QSPI_SPIBC, config USE_RZ_FSP_QSPI_XSPI then select from flash driver Kconfig instead of using a common select USE_RZ_FSP_QSPI for 2 hal sources?

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@tiennguyenzg can you answer the question ?

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@KhiemNguyenT, @quytranpzz
Sorry for my late response,
We should use two different configs because, from HAL's perspective, these are two different modules rather than another version.

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from HAL's perspective, these are two different modules rather than another version.

Yes, since they are 2 different modules, I was wondering why we don't use 2 configs to select lib source from HAL instead of one (config USE_RZ_FSP_QSPI)
https://github.com/renesas/zephyr/blob/rz_support_flash/drivers/flash/Kconfig.renesas_rz_qspi#L13 and https://github.com/renesas/zephyr/blob/rz_support_flash/drivers/flash/Kconfig.renesas_rz_qspi#L26

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@tiennguyenzg tiennguyenzg Oct 14, 2025

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I will update to use two configs in the Zephyr branch. And please help me check the latest updates of this branch. Thanks.

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@quytranpzz please help to check again the update.

@tiennguyenzg tiennguyenzg force-pushed the renesas_rz_support_flash branch 2 times, most recently from 7f2d562 to 50d36f4 Compare October 14, 2025 06:45
Comment on lines 15 to 20
#define XSPI_QSPI_CFG_UNIT_0_CS_0_END_ADDRESS (0x600FFFFF)
#define XSPI_QSPI_CFG_UNIT_0_CS_1_START_ADDRESS (0x64000000)
#define XSPI_QSPI_CFG_UNIT_0_CS_1_END_ADDRESS (0x640FFFFF)
#define XSPI_QSPI_CFG_UNIT_1_CS_0_END_ADDRESS (0x680FFFFF)
#define XSPI_QSPI_CFG_UNIT_1_CS_1_START_ADDRESS (0x6C000000)
#define XSPI_QSPI_CFG_UNIT_1_CS_1_END_ADDRESS (0x6C0FFFFF)
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Hello @tiennguyenzg ,
Is the address space partitioning fixed? I mean, can't we divide chip select region 0 and 1 with another value?

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I think address space partitioning can be adjusted within the specified range, as shown below:
image

However, RZT/N FSP does not support enable Custom Address Space.
image

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Thanks for clarifying.

Comment on lines 15 to 20
#define XSPI_QSPI_CFG_UNIT_0_CS_0_END_ADDRESS (0x600FFFFF)
#define XSPI_QSPI_CFG_UNIT_0_CS_1_START_ADDRESS (0x64000000)
#define XSPI_QSPI_CFG_UNIT_0_CS_1_END_ADDRESS (0x640FFFFF)
#define XSPI_QSPI_CFG_UNIT_1_CS_0_END_ADDRESS (0x680FFFFF)
#define XSPI_QSPI_CFG_UNIT_1_CS_1_START_ADDRESS (0x6C000000)
#define XSPI_QSPI_CFG_UNIT_1_CS_1_END_ADDRESS (0x6C0FFFFF)
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Thanks for clarifying.

#define XSPI_QSPI_CFG_UNIT_0_IOVOLTAGE (0)
#define XSPI_QSPI_CFG_UNIT_1_IOVOLTAGE (0)
#define XSPI_QSPI_CFG_DMAC_SUPPORT_ENABLE (0)
#define XSPI_QSPI_CFG_UNIT_0_CS_0_END_ADDRESS (0x600FFFFF)
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Should it be 0x63FFFFFF?
image

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The macro XSPI_QSPI_CFG_UNIT_0_CS_0_END_ADDRESS is only used when the Custom Address Space configuration is enabled. The value 0x600FFFFF is the default in the current FSP configuration.
That said, updating it to 0x63FFFFFF would better align with the FSP documentation (https://renesas.github.io/rzt-fsp/group___x_s_p_i___q_s_p_i.html). I will update it to make consistency.
Thank you for your review!

Add XSPI QSPI FSP HAL driver to support Zephyr Flash driver for RZ/T2M

Signed-off-by: Tien Nguyen <[email protected]>
Add XSPI_QSPI FSP HAL driver to support Zephyr Flash driver for RZ/N2L

Signed-off-by: Tien Nguyen <[email protected]>
Add SPIBSC FSP HAL driver to support Zephyr Flash driver for RZ/A3UL

Signed-off-by: Tien Nguyen <[email protected]>
@tiennguyenzg tiennguyenzg force-pushed the renesas_rz_support_flash branch from 50d36f4 to 46918b5 Compare October 17, 2025 06:50
@quytranpzz
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Thanks, LGTM

@KhiemNguyenT KhiemNguyenT self-requested a review October 17, 2025 08:17
@KhiemNguyenT KhiemNguyenT merged commit 3ce2bdc into zephyrproject-rtos:main Oct 17, 2025
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4 participants